DMA on EMIF using RM48L952ZWT

Vishal,

For DMA, EMIF address space is treated just like any other address. If you can make 8/16/32/... bit access to the FPGA from cpu you can make similar access with DMA. Take a DMA example and change the source/destination address with the FPGA mem-space address to test. EMIF and most probably MPU unit should be configured correctly for reliable access to EMIF. Search the forum for EMIF/MPU configuration if you have read/write issues.

1. Initialize DMA unit.

2. Configure 'a' channel with the source/dest. addresses, access mode, triggering scheme... (There are multiple examples)

3. If hw triggered, configure the DMA request line to trigger "this" configured channel

You may need to get creative to hw trigger DMA channel.

Good luck,

Joe

Joe,

I am doing following steps to read from FPGA

dmaConfigCtrlPacket((uint32)(0x68000020),(uint32)(&TX_DATA),D_SIZE);

dmaSetCtrlPacket(DMA_CH0,g_dmaCTRLPKT);

dmaSetChEnable(DMA_CH0, DMA_SW);

dmaEnable();

In this case I am getting the response in tx_buff but same values receiving on two locations.

Can you give me some steps to initialize the DMA with SW trigger

  Thanks & Regards,

Vishal

Thanks for reply.

Now I am getting actual data. I am using address offset mode and I was giving incorrect offset. So after correcting it I am getting data on contagious memory locations.

dmaSetChEnable(DMA_CH0, DMA_SW);
That I am using it after DMA enable and it is working fine.

But I found that it doesn't support auto initialisation in frame transfer mode.

Also I want to configure Interrupt for block transfer please give some guideline for it.

Thanks & Regards,
Vishal

Vishal,

Frame and block are just dimensions, so I'm thinking if you want to auto-initialize on a frame boundary then maybe you are using 2 dimensions where you should only be using one dimension. (i.e. only 1 frame in the block)

What exactly did you want to achieve in terms of a transfer pattern?

Anthony,

My goal is to read some data from FPGA when I will get interrupt on pin from FPGA. On every GIO interrupt I will be reading around 1000 bytes of data. In that case once read process done by using DMA I need to process that read data from FPGA. So for that I am trying to initialise DMA interrupt like

dmaEnableInterrupt( 0, BTC);

But I am not getting interrupt when read done by DMA channel. Please give me some guidelines for this.


Thanks & Regards,
Vishal

Vishal,

I think you need to decide on a strategy first.  Starting from the triggering.

So your two options for this are below:

If you have the RAM available to store multiple bursts of this FPGA data what you could do is configure your DMA as shown in the first case, figure 16-2.

Now, you would configure your DMA for some number (N) frames,  and the frame count would be something like 1000, 500, or 250 depending on whether you set the element size as 8, 16, or 32-bits, and assuming that you need 1000 bytes read for each frame.

Now each DMA request causes a frame of 1000 bytes to be transferred.   So you would want your interrupt based on FTC (Frame Transfer Complete).

In the simple case with storage in RAM for 2 frames you could ping-pong between the 2 frames and actually be operating on the previously read frame while the DMA is in the process of loading a new frame from the FPGA into RAM.   Or you could extend this to 3, 4, 5, or more frames. 

You can set your DMA packet to auto-initialize so that it automatically starts over writing into the area of the first frame, after the last frame is complete.
By doing this you wouldn't need to reconfigure the DMA once it's started, you just need to keep a count of the # of FTC interrupts and make sure none are dropped...