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RM57 Undocumented ESM registers

Dan Kirkpatrick
Prodigy 90 points

The RM57 TRM (SPNU562) shows ESM control registers up to ESMSR4 at offset 0x58:

However, the ESM header file HL_reg_esm.h shows three SR4 registers at offset 0x58, 0x5C, and 0x60:

And the ESM init code writes to all three registers:

What are the extra registers (SR4[1U] and SR4[2U]) for?

Why do we need to write to them if there is no description of them in the TRM documentation?

Dan

  • 0
    TI__Guru 69070 points
    Dan,

    Thanks - the same question is still open here: http://e2e.ti.com/support/microcontrollers/hercules/f/312/t/388856
    But we're still working on an answer. I doubt we'll have an answer before Jan though as key folks are already out for the holiday.
  • 0
    TI__Mastermind 49120 points
    Dan,

    The array SR1[0, 1, 2] registers include the status flags for the first 32 (0 to 31) channels for group1, group2 and group3 errors.

    The array SR4[0, 1, 2] registers include the status flags for group1 error channels 32 to 127. The RM57x MCUs have 96 group1 error channels. This is the reason for the writes to these status flags to clear them. The write to the SR4[2] is not necessary as there are no error signals mapped to these flags.

    The TRM needs to be updated to clarify this.

    Sunil