FSS signal in SSI master mode (using DMA)

Hi,

I have Tiva tm4c1231h6pge, and I have programmed SSI2 and DMA as follow:

char data[6]={0x35,0x35,0x35,0x35,0x35,0x35};

#define UDMA_CHANNEL_SSI2TX		13


[...]
    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);
    ROM_GPIOPinConfigure(GPIO_PH4_SSI2CLK);
    ROM_GPIOPinConfigure(GPIO_PH7_SSI2TX);
    ROM_GPIOPinConfigure(GPIO_PH5_SSI2FSS);
    ROM_GPIOPinTypeSSI(GPIO_PORTH_BASE, GPIO_PIN_7 | GPIO_PIN_4 | GPIO_PIN_5);
    ROM_SSIConfigSetExpClk(SSI2_BASE, 24576000UL, SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 192000, 8);
    ROM_SSIEnable(SSI2_BASE);

   // DMA is correctly initialized
    ROM_SSIDMAEnable(SSI2_BASE, SSI_DMA_TX);
    ROM_uDMAChannelAssign(UDMA_CH13_SSI2TX);
    ROM_uDMAChannelAttributeDisable(UDMA_CHANNEL_SSI2TX, UDMA_ATTR_ALTSELECT | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK);
    ROM_uDMAChannelAttributeEnable(UDMA_CHANNEL_SSI2TX, UDMA_ATTR_USEBURST);
    ROM_uDMAChannelControlSet(UDMA_CHANNEL_SSI2TX | UDMA_PRI_SELECT, UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE | UDMA_ARB_4);
    ROM_uDMAChannelTransferSet(UDMA_CHANNEL_SSI2TX | UDMA_PRI_SELECT, UDMA_MODE_BASIC, data, (void *)(SSI2_BASE + SSI_O_DR), sizeof(data));
    ROM_uDMAChannelEnable(UDMA_CHANNEL_SSI2TX);

Using SSI_FRF_MODE_0 for every byte transfered FFS is asserted and deasserted:

In this screenshot cyan trace (number 2) is FSS, and green (4) is clock. the other are miso and mosi.

If I just change from SSI_FRF_MODE_0 to SSI_FRF_MODE_1 the FSS is asserted only one:

I don't know why. Is possible to have only one transacton using mode 0?

best regards

max