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What happens when MCU power up - cortex M4

VT
Genius 3300 points
Other Parts Discussed in Thread: TM4C123GH6PM

1. I want to know what happens when MCU powered up specific to cortex M4.
2. I have attached one keil program using TM4C123GH6PM. Its basic program to start working.
3. TM4C123GH6PM has 16Mhz internal OSC

4. I had read that flash/ram in M4 are arranged in below sequence:

Flash-> test+lireal , read only data , copy of ram data section
Ram -> Data section , bss section , heap , stack


5. According to me the exact sequence is:

Power up or any reset -> Internal clock 16Mhz init -> All peripheral/system register assigned default values -> bss section assign zero value -> ram data section assigned values from flash -> PC goes to reset handler

test.zip

  • 0
    TI__Guru**** 244400 points
    Hello Vindhyachal

    Not sure what your question is here but to keep the context of the post

    After Power Up the CM4 executes code from the ROM. The peripheral/system registers are reset to the default values and not assigned the default value by the CM4. It then checks for the Flash Application code and if it does not see an application code it has the ROM Boot Loaders to search the serial interfaces for a boot image. If there is a valid application code in Flash (check is to see location 0x0 and 0x4 for a seemingly valid SP-PC), it will jump to the Flash Image.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Genius 3300 points
    Hello Amit,

    I just want to know what happens when MCU power up.
    Like you had write it executes code from ROM first. Do before this steup c16Mhz clock get init?
    When did r/w data get initialized?
  • 0 in reply to VT
    TI__Guru**** 244400 points
    Hello Vindhyachal,

    I have already written what happens when TM4C device powers up. What do you mean by 16MHz clock get init and which R/W data are you referring to?

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Guru 10570 points
    Vindhyachal,

    You have grouped together elements that are the responsibility of not only the chip but also the compiler.

    Amit has explained what the chip does on reset. Once the PC is set to the reset vector, the rest of the setup depends on the language and compiler that is used.

    Note that the terms you are using for memory locations are not universal. In some compilers you can name them whatever you like. In some languages the distinction implied does not exist.

    That said, the terms suggest you are using a C or C++ compiler. For both of these the standard requires that memory be initialized and that any other setup for the language runtime be done before main is called. How this is done and the order it is done in is compiler dependent. Not only that but for embedded targets you often can modify the startup yourself and change the order of initialization , add and subtract initialization steps to suit your own circumstances.

    Two small additions to Amit's notes. The reset is documented in the user manual. For most processors the source of the reset matters, different sources perform different initialization subsets. For the TIVA series that difference is small, but if you depend on the configuration it's something you must consider.

    Robert
  • 0
    Guru 117855 points

    Vindhyachal Takniki said:
    I want to know...

    Pardon but does not "that" opening well signal, "what's to come?"

    I want to know why we should care - and why Amit's responses are deemed less than satisfying.

    Poster may have legitimate need - helpful to many here - but that, "greater good" detailing has escaped his focus/mention...

    Robert well illustrates the weaknesses in earlier "conclusions" - and "totally single user", focused wants...