• State Resolved
  • Locked Locked
  • Replies 12 replies
  • Subscribers 30 subscribers
  • Views 1185 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM48L952ZWT MibSPI3 Loopback Demo

Ubaid Mahmood
Intellectual 970 points
Other Parts Discussed in Thread: HALCOGEN

Hello,

I am following the HalcoGen SPI loopback demo example, but for MIBSPI3.  Other than properly referencing MIBSPI3 instead of MIBSPI1, what else is needed for the loopback demo to work properly?  I assume mibspiRAM1 is still a valid reference despite using MIBSPI3.

Also, if I want to test the loopback against cs[1], is it simply a channel reference that needs updating?

Thanks.

  • 0
    TI__Guru 68920 points
    Ubaid,

    First, generally yes you can adapt the loopback test to any of the MibSPI's. Each MibSPI has it's own RAM, and if you are using MibSPI3 instead of MibSPI1 then you need to interact with the RAM for MibSPI#3.

    The chip select question can be more complicated. I would try to get the test working without a chip select first and then come back to this... Also check other posts on this forum as people typically have trouble getting the multiple chip selects working the first time.
  • 0 in reply to Anthony F. Seely
    Intellectual 970 points
    Hello Thanks Anthony.

    I tested with mibspiRAM3 for mibSPI3 and the loop back test failed. I followed the example and made changes in HalcoGen and source code for minSPI3. I am ignoring chipselet options as you suggested. Is there anything else needed?

    Ubaid
  • 0 in reply to Ubaid Mahmood
    TI__Guru 68920 points
    Hi Ubaid,

    Hard to say. Did you make sure to change any relevant config in the VIM (if you are using interrupts) and/or in the DMA control packet if the example is DMA driven? Of course there is pinmux to check.

    Aside from these things, I would then start examining the state of the MibSPI ... check it's status registers to see what they tell you ... and try to understand how far along it's getting.
  • 0 in reply to Anthony F. Seely
    Intellectual 970 points

    Hello,

    I did make changes to the DMA.  And confirmed that there are no conflicts with the pinmux.  I have enabled USB Host 0, USB Device, AD1EVT, MIBSPI3, SCI, and I2C.

     I resolved the following pinmux conflicts.  The following has priority:

        -B2: I2C_SDA

        -C3: I2C_SCL

        -E3: W2FC_VBUSI

        -W9: MIBSPI3NENA

    I can attach the halcogen project file as well.  How can I do that?  Whenever I use "Insert/Edit Media" it shows up as an icon.

    The following is the code snippet for testing the loopback. NOTE: mibspiInit(); is called at a higher level in the main.:

    uint8   mibspiTest = PASS;
    int i;
       /* - creating a data chunk in system ram to start with ... */
       loadDataPattern(D_SIZE,&TX_DATA[0]);
       /* - enabling loopback ( this is to emulate data transfer without external wires */
       mibspiEnableInternalLoopback(mibspiREG3);
       /* - assigning dma request: channel-0 with request line - 1 */
       dmaReqAssign(0,1 );
       /* - configuring dma control packets   */
       dmaConfigCtrlPacket((uint32)(&TX_DATA),(uint32)(&(mibspiRAM3->tx[0].data)),D_SIZE);
       /* upto 32 control packets are supported. */
       /* - setting dma control packets */
       dmaSetCtrlPacket(DMA_CH0,g_dmaCTRLPKT);
       /* - setting the dma channel to trigger on h/w request */
       dmaSetChEnable(DMA_CH0, DMA_HW);
       /* - configuring the mibspi dma , channel 0 , tx line -0 , rxline -1     */
       /* - refer to the device data sheet dma request source for mibspi tx/rx  */
       mibspiDmaConfig(mibspiREG3,0,0,1);
       
       /* - enabling dma module */
       dmaEnable();
       /* - start the mibspi transfer tg 0 */
       mibspiTransfer(mibspiREG3,0 );
       /* ... wait until transfer complete  */
       while(!(mibspiIsTransferComplete(mibspiREG3,0)))
       {
       };
       /* copy from mibspi ram to sys ram */
       mibspiGetData(mibspiREG3, 0, RX_DATA);
       for (i = 0;i < D_SIZE; i++)
       {
         if (TX_DATA[i] != RX_DATA[i])
         {
        mibspiTest = FAIL;
         }
       }
       if (mibspiTest == PASS)
       {
         sciSend (scilinREG, 48 , (unsigned char *) "\r\nMIBSPI Test Loopback .................. PASS\r\n");
       }
       else
       {
         sciSend (scilinREG, 48 , (unsigned char *) "\r\nMIBSPI Test Loopback .................. FAIL\r\n");
       }

    Ubaid

  • 0 in reply to Ubaid Mahmood
    TI__Guru 68920 points

    Ubaid,

    This line still looks like it's setup for MibSPI1...:

       /* - assigning dma request: channel-0 with request line - 1 */
       dmaReqAssign(0,1 );
    The DMA channel mapping is described in Table 4-33 of the datasheet.  I think you need to assign request 15 to channel 0 for MibSPI3.
    Note that there is a conflict between this DMA request and the USB device, so if you plan to use both at the same time you probably have more work to do.
    But this is something I'd also put off until the basic example is running.
    Not sure about the Insert/Edit Media.  I thought there was a button for file but I don't see it now.
  • 0 in reply to Anthony F. Seely
    Intellectual 970 points
    That is where I went wrong. Thank you! It is working properly.

    I left the tx line unchanged for the loopback test. Under what scenarios must this be configured?

    I am investigating chip select functionality now.

    -Ubaid
  • 0 in reply to Ubaid Mahmood
    TI__Guru 68920 points

    Hi Ubaid,


    Super, glad that's all it was.

    Not sure what the question:

    Ubaid Mahmood said:
    I left the tx line unchanged for the loopback test. Under what scenarios must this be configured?

    means.  Is there some line of code that you're asking about - or a pin configuration question?

    FYI - Regarding the upload question that you had, on the internal (TI'ers only) forum under /etc/ there's a post about this already from one of our field apps engineers.  The short version of the answer is:

      a) there are 2 media buttons.  for a file you use the 2nd one (looks like a segment of film, not an instant camera print).

      b) it'll show an ICON for the file during edit mode, but once hit 'Post' this gets fixed up.

    Supposed to be something that is being worked on for a fix...   Seems like you might also be able to just drag & drop into the edit window in rich text mode, but I haven't tried that myself yet.

  • 0 in reply to Anthony F. Seely
    Intellectual 970 points

    Hello,

    Thanks.

    I understood from the forums that the transfer groups need to be configured to access the chipselect.  I have attached a screenshot of transfer group 0 and 1 for reference.  I want to access chip select 1 and therefore configured transfer group 1 to use chipselect 1.

    I also updated the following lines of code to use the new transfer group:

    mibspiTransfer(mibspiREG3,1 );

    /* ... wait until transfer complete */
    while(!(mibspiIsTransferComplete(mibspiREG3,1)))
    {
    };

    /* copy from mibspi ram to sys ram */
    mibspiGetData(mibspiREG3, 1, RX_DATA);

    Is this proper procedure to access chip select 1 on mibSPI3?

    Thanks.
    Ubaid

  • 0 in reply to Ubaid Mahmood
    TI__Guru 68920 points
    Hi Ubaid,

    Sorry it's been a while since I've played with that example. I think if you are just using MibSPI3 in loopback mode, you have it configured as a master and then what you have mentioned above is correct.

    It get's trickier in slave mode when you introduce the chip select. Are you planning to also use the MibSPI in slave mode?
  • 0 in reply to Anthony F. Seely
    Intellectual 970 points
    Hello,

    Good to see I am on the right track. No, we are not wanting the MibSPI to behave as a slave, only a master device.

    I haven't had luck getting the loopback on mibSPI3 cs1 working just yet. Do you have any guidance for me?

    I understand that the current drivers are intended to communicate with a single SPI slave device. To communicate with two devices, is selecting the transfer group sufficient, or is additional coordination needed?

    Thanks.
    Ubaid
  • 0 in reply to Ubaid Mahmood
    Intellectual 970 points
    Hello Anthony,

    How else should the target groups be configured to access a chipselect?

    Thanks.
    Ubaid
  • 0 in reply to Ubaid Mahmood
    Intellectual 970 points

    Hello,

    I made sure that SCS 0 and SCS 1 are both functional in HalcoGen.

    Ubaid