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System Clock in TM4c123GH6PM

Other Parts Discussed in Thread: TM4C123GH6PM

Hi,

SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ|SYSCTL_OSC_MAIN); 

// This line sets the clock at 40 Mhz

SysCtlClockSet(SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ|SYSCTL_OSC_MAIN);    // This line will set the clock freq at 200 Mhz, 

But in the datasheet it was given as 80 Mhz for TM4C123GH6PM , what will be the input frequency to the system if the sysctlclockset is at 200Mhz

  • Hi, if xtal is the one you specified @16Mhz result in PLL running @ 200MHz so
    dividing it by from Cpuclock= PLL/Divisor when divisor is 5 (SYSCTL_SYSDIV_5) then cpufreq is 200/5 -> 40MHz
    dividing by fractional 2.5 then frequency is the maximum of 80MHz, this processor work at no more than 80MHz so be careful selecting PLL divisor, overclock stop or cause strange behave.
    to run @80 MHz 2.5 divisir is needed so

    SysCtlClockSet(SYSCTL_SYSDIV_2_5|SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ|SYSCTL_OSC_MAIN);

    // This line sets the clock at 80 Mhz

    @Amit, is better a lot of sticky or split to collect Faq about same argument ? ;)
  • Haresh G said:
    // This line will set the clock freq at 200 Mhz, 

    Did you verify this using oscilloscope?

    It is mentioned at the datasheet that "Tiva™ C Series architecture offers a 80 MHz Cortex-M". So, 80 Mhz is the highest System Clock within specification.

    200 MHz System Clock is very unlikely to happen. 

    You, can find more info about this by going through the "Clock Section" of your Tiva MCU Datasheet.

    - kel

  • Markel Robregado said:
    Haresh G
    // This line will set the clock freq at 200 Mhz, 

    Did you verify this using oscilloscope?

    It is mentioned at the datasheet that "Tiva™ C Series architecture offers a 80 MHz Cortex-M". So, 80 Mhz is the highest System Clock within specification.

    200 MHz System Clock is very unlikely to happen. 

     Uhmmm.. very interesting.. Hey Markel, HOW CAN I SEE THIS CLOCK BY A SCOPE????

     I remember you this is a TM4C123 series, this series is limited to max 80MHz so how can you think this can be done?

     No trouble for instrument I own 20GHz scope, 2GHz capable LA and scope correlate on same instrument, analog scope at 400MHz bandwidth and very low capacitance active probe with 1GHz bandwidth, forgetting RF instrumentation I am not sure it can apply please can you guide me how can I measure PLL frequency and system clock too?

     Thank a lot.

  • Roberto Romano said:
    I am not sure it can apply please can you guide me how can I measure PLL frequency and system clock too?

    No.

    - kel

  • Markel Robregado said:
    I am not sure it can apply please can you guide me how can I measure PLL frequency and system clock too?

    No.

     So I think this is a not appropriate answer,

     again ask I am not able to do, on TM4C123 how can we measure clock by a scope??

     PLZ Someone can answer?

     Amit I apologize but sometimes GURU Level is not appropriate(not me on this silly question).

     TM4c129 has clock out pin but I am not able to find where to set something on 123 series, is someone able to point me where this is?

  • As is past my sleep time, I was imagining that System Clock can be measured through one of the GPIO pins.

    Good Night Roberto . . Happy New Year to you . . .

    - kel
  • Markel Robregado said:
    As is past my sleep time, I was imagining that System Clock can be measured through one of the GPIO pins.

    Good Night Roberto . . Happy New Year to you . . .

     Good night to you too, here is just late afternoon, so I am not prone to sleep nor I am when I wake on night time.

     You are one of contrary to splitting, and you got catched by yourself.

     If all related clock issue where collected you can simply read TM123 series has no clock output pin but JUST 129 series has it. Measuring a 200MHz clock with a scope is not a simple thing and require some RF measurement skill to be effective.

     Have your forced learning from this epic fail.

     

  • Hi everyone,


    You can of course measure a division of the clock frequency with a known division. I am talking about measuring a pwm output from a timer. If you use a period of value 2 you should get half the system clock. But if the clock really goes over 80Mhz then who knows. behavior might not be predictable.
  • Hello Haresh,

    The System Clock is the input frequency to the System. So if you configure it for 200MHz, it will overclock the device and since TM4C123 is not rated for >80MHz, what you would end up with is a locked system. There is the MINDIV protection mechanism, but it is meant for protecting in case of a wrong divider selection can be overriden by using wrong parameters (again leading to a locked system).

    Regards
    Amit
  • Luis Afonso said:
    behavior might not be predictable.

     Hi Luis, I start on reverse by your GOOD last sentence. You say a great thing in this sentence!!! I explain on the way.

    Luis Afonso said:
    You can of course measure a division of the clock frequency with a known division. I am talking about measuring a pwm output from a timer. If you use a period of value 2 you should get half the system clock. But if the clock really goes over 80Mhz then who knows.

     This way many problem come to and what are you evaluating is not frequency but a pounded too, Jiitter, drift and slope of internal external clock can change everything was on internal clock too.

     Another not to forget is when we raise frequency all parameter also scattering interfer more than on dc or low frequency and also capacitance get a big trouble so as learning try these link:

    and if you can get take a look at this book and the one mentioned on article too:

    http://www.springer.com/engineering/circuits+%26+systems/book/978-0-442-00636-5

     When I was beginner I was thinking raising frequency of digital circuit to measure frequency as high as it come, it cannot be possible and when frequency raise over measurement change to analog evaluation due to intrinsic limit of digital domain.

     So your last sentence about behaviour is a gold rule to be in mind at first place.

  • Amit Ashara said:
    There is the MINDIV protection mechanism, but it is meant for protecting in case of a wrong divider selection can be overriden by using wrong parameters (again leading to a locked system).

     Amit, I see you perform a superguru figure about this processor, asking help to, have you time to wrote a book to this processor I think very few other know in deep as you?

     You are knowing detail probably on silicon I can bet you got designing in or codesign. Thank again new detail we missed , I got a new reading of clock section, so I assumed PLL @200MHZ, I seen it is running @400Mhz and divisor can be bypassed so it can result in a more severe overclock.

     Amit, protection is that one mentioned IE in section 5.2.5.9 of tm4c123gh6pm? Thank provide this information detail, but I don't see how to disable control in paragraph. I hope this is not a good way but is better know to avoid problem.

     Reading again data sheet paragraph under a great guide help sharp our knowledge details ;)

     Edit after reading again one more time data sheet: Also a good book of library and rom usage can be of help, documentation about is not simple and dispersed, a good guide to tiva has to be written integrating all document with examples and what one need to be productive:

    http://www.ti.com/product/TM4C123GH6PM/technicaldocuments

     One book to cover all aspect is still missing or I never found. Amit, what you think is a similar book missing can be done from your staff(not for free)?

  • Hello Roberto,

    With inputs from you, cb1, Petrei, Luis and a lot of others, my book would be titled "how to design and document a uC". And you are right on the design aspect...

    Regards
    Amit
  • Wonderful.. Where can I prepay to have a copy of so wonderful book from one of TIVA designer?? :P
    Amit I also propose a sticky.. Before you can post here MUST buy (and read too) THIS BOOK!
  • Hi ,

    which systemclock should I configure with ADC & timer module ( I am using both module in same code)..??

    SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 80MHz
    SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 50MHz
    SysCtlClockSet(SYSCTL_SYSDIV_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 40MHz

    If I dont write any of above, I get :: freq = SysCtlClockGet(); // 16MHz

    My requirement is lowest execution time.
    Should I configure to 80MHz..??

    If I do so will both ADC and Timers will work fine..??
    Is any extra configuration needed...?



    Regards,
    Krishnat
  • According to datasheet, if I set system clock 16 Mhz then only for 1msps setting, conversion time will be 1us.

    What will be conversion time if I set System clock 40 Mhz, 1msps setting..?? OR

    What will be conversion time if I set System clock 80 Mhz, 1msps setting..??

  • Hello Krishnat

    Execution time would be inversely proportional to the system clock frequency. However for system frequency above 40MHz the prefetch buffer would slow down the execution slightly.