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Problems Reading/Writing 32-bit data using external SDRAM, EPI_MODE_HB16. 8-bit and 16-bit OK.

Other Parts Discussed in Thread: TM4C1292NCPDT

Hi,

I'm using the TM4C1292NCPDT processor with external SDRAM mode
EPI_MODE_HB16.  

I can write/read to the SDRAM correctly as 8-bit or 16-bit data.

However, I cannot write a full 32-bit value to an area defined
as 32-bit data, for example, data = 0x00bc614e (12345678 dec)
writing to LongVarsNv[0] at address 0x60002FF0.  

When I verify the data by reading back into a local variable I
receive 0x00bc00bc.

Put logic analyzer on this and verified that a single 16-bit
data write occurs during the write of 32-bit data to external
memory and a single 16-bit read occurs during the read from
external memory.

Some pieces of the code and .cmd file below.  Any help would be
greatly appreciated!

Thanks,

Larry


/////////////////////
//
// .cmd file
//
/////////////////////

    MISC_UNUSED_NV (RW): origin = 0x60000AE8, length = 0x2508             
    LONG_VARS_NV (RW): origin = 0x60002FF0, length = 0x0010            
.
.
.
    MiscUnusedNv: > MISC_UNUSED_NV
    LongVarsNv: > LONG_VARS_NV



/////////////////////
/////////////////////

#pragma DATA_SECTION(LongVarsNv,"LongVarsNv");      

uint32_t LongVarsNv[4];                        
.
.
.


/////////////////////
/////////////////////

extern uint32_t LongVarsNv[];                        


void ReadNov(void)
{
    uint32_t readBack32;

    LongVarsNv[0] = 0x00bc614e;        // 12345678 dec
    LongVarsNv[1] = 0x00a98ac7;        // 11111111 dec
    LongVarsNv[2] = 0x0153158e;        // 22222222 dec
    LongVarsNv[3] = 0x01fca055;        // 33333333 dec

    readBack32 = 0;
    readBack32 = LongVarsNv[0];        // readBack32 = 0x00bc00bc
    readBack32 = 0;
    readBack32 = LongVarsNv[1];        // readBack32 = 0x00a900a9
    readBack32 = 0;
    readBack32 = LongVarsNv[2];        // readBack32 = 0x01530153
    readBack32 = 0;
    readBack32 = LongVarsNv[3];        // readBack32 = 0x01fc01fc
}


/////////////////////
/////////////////////

void InitEpi(void)
{
    volatile uint16_t *ptrNVram;
    volatile uint16_t j, i, readback;


    //
    // Sets the usage mode of the EPI module.
    //
    EPIModeSet(EPI0_BASE, EPI_MODE_HB16 | 0x00000100);


    //
    // Is our current system clock faster than we can drive the SDRAM clock?
    //
    if(g_ui32SysClock > 60000000)
    {
        //
        // Slow down the EPI clock.
        //
        EPIDividerCSSet(EPI0_BASE, 0, 0x0020);   
        EPIDividerCSSet(EPI0_BASE, 1, 0x003b);  
    }
    else
    {
        //
        // With a system clock of 60MHz or lower, we can drive the SDRAM at
        // the same rate so set the divider to 0.
        //
        EPIDividerCSSet(EPI0_BASE, 0, 0x0000);  
        EPIDividerCSSet(EPI0_BASE, 1, 0x0000);   
    }


    EPIConfigHB16CSSet(EPI0_BASE, 0, EPI_HB16_ALE_HIGH | EPI_HB16_BURST_TRAFFIC | EPI_HB16_WRWAIT_0 | EPI_HB16_RDWAIT_0 | EPI_HB16_BSEL);
    EPIConfigHB16CSSet(EPI0_BASE, 1, 0x0E000000 | EPI_HB16_ALE_HIGH | EPI_HB16_BURST_TRAFFIC | EPI_HB16_WRWAIT_3 | EPI_HB16_RDWAIT_3);


    //
    // Set the address map.
    // The EPI0 is mapped from 0x60000000 to 0x60020000.
    // Although our SDRAM is only 128K bytes, there is no 128KB
    // aperture option so we pick the next larger size.
    //
    EPIAddressMapSet(EPI0_BASE, EPI_ADDR_PER_SIZE_256MB |EPI_ADDR_RAM_SIZE_256MB | EPI_ADDR_QUAD_MODE);

}

  • Hello Larry

    Which SDRAM memory are you using? We have an example code for SDRAM in the TivaWare which we have tested with both ISSi and Micron SDRAM parts and the 32-bit access actually gets converted to dual 16-bit access.

    Now looking at the code you have, you are using HB16 mode, which is not the correct mode for SDRAM. For the TM4C devices the SDRAM mode is a different mode altogether, so i would suggest referring to the TivaWare example called sdram.c

    Regards
    Amit
  • Hi Amit,

    Thanks for your response. My mistake!!! We are using SRAM (not SDRAM). The part number is FM21L16-60-TG. The manufacturer is RAMTRON.

    Any other thoughts you might have would be appreciated!

    Thanks

    Larry
  • Hello Larry,

    The device is a FRAM device (I would need to study its spec). However one thing that you may want to do is to remove EPI_HB16_BURST_TRAFFIC. Also there are a lot of issues as I see

    1. How many CS are you using?
    2. Why QUAD mode is being used in Address Map Set API
    3. What is the System and the Interface clock setting being used?

    Regards
    Amit
  • Hi Amit,

    We made one change - removed the EPI_HB16_BURST_TRAFFIC and this seemed to correct the problem!

    Also,
    - we are currently using 2 chip selects
    - selected QUAD mode in the event we may need to add another device at a later time
    - system clock is 120 MHZ
    - for CS0 clock is ~3.5 MHZ, for CS1 clock is ~2.0 MHZ (we realize these still need to be optimized)

    Thanks so much for your help! Any other suggestions are appreciated!

    Larry
  • Hello Larry,

    Great. Since the devices can work faster, you may want to increase the clock speed to increase the performance from these devices.

    Regards
    Amit