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Enabling peripherals - Legacy registers vs "normal" registers

Luis Afonso
Guru 20670 points


Hi everyone,

When I enable the clock for a peripheral I normally add the 3 cycle delay ( I use 9 actually) that is said in the legacy registers.
But is that necessary if the "normal" registers like RCGCGPIO is used?

The TivaWare function seems to use the "normal" registers and it actually says in the source files to use a 5 cycle delay

  • 0
    TI__Guru**** 244400 points
    Hello Luis,

    Yes, for Normal registers adding the delay is still true. However the right approach is to use the PRGPIO register to ensure that the peripheral is ready.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Guru 47900 points

    Amit Ashara said:
    the right approach is to use the PRGPIO register to ensure that the peripheral is ready.  

    What may prove interesting is the insertion of a loop counter w/in the PRGPIO register read - to determine if - and for how many read cycles - the peripheral remains, "unready."   (my $$$ on - very few - if any...)

  • 0 in reply to cb1
    Guru 20670 points

    They should be really few, normally 3-9 cycles, don't quite know the right number.
    But I doubt there isn't a need for waiting. In various occasions I saw a Fault ISR for accessing the registers of a peripheral right next to enabling the clock (and this with TivaWare which adds cycles with function calls)