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TMS570LC4357 MibSPI configured as GPIO

Hello,

I am trying to configure as many GPIO pins as possible from MibSPI module (already explored other modules, like RTP, etc.). Based on RTM, it seems like the CLK and ENA are shared for all 5 sub modules. What I mean is the following

There are MIBSPI1CLK, MIBSPI2CLK...MIBSPI5CLK physical pins, so for ENA, yet there is only one bit, like CLKDIR in SPIPC1 register to control the CLK direction or CLKSET in SPIPC4 register. So SPI1,2,3,4,5 CLK must behave at the same time. Please confirm.

If so, what if I hook up MIBSPI1CLK to signal A externally and MIBSPI2CLK to signal B externally, for example, and I configure both CLK as general input pins but the signal A and B have different state (driven by external signals)? Is it prohibited situation? what is the value of CLKDIN bit in SPIPC2 register?

Thanks

Ning

  • Hi Ning,

     

    I don’t quite understand what you mean. The CLK and ENA are separate for each sub-module. There are different physical pins available for each MIBSPI module. There are also different SPIPCx registers available for each module. You can check the TMS570LC43xx Datasheet(Terminal Configurations and Functions > Terminal Functions > ZWT Package > Multi-Buffered Serial Peripheral Interface Modules). In Table 3-14, you can check the description to see which all pins are available to be used as GPIO. Certain pins have to be configured as GPIO pins in the MIBSPI module. You can find more info on this in the TRM(MibSPIP > Basic Operation > General-Purpose I/O).

     

    Thanks and Regards,

    Vineeth

  • Yes, there are separate CLK/ENA pins for each sub module. My question is about the register control in TRM. 

    I think the best way is to give me an example code to achieve the following feature

    1) configure CLK/ENA for every sub module to GPIO as in input

    2) Read the MIBSPI1CLK and MIBSPI2CLK pin status AT THE SAME TIME

    Please give a CCS example code.

    Thanks

  • OK, I didn't realized that each MibSPI has it's own sets of register controls. I think my original question is answered.
    Now I have another question: if I configure all MibSPI to general input and want to read all pins (assume the input is stable already), I need to read one by one per module, which will take 5 CPU clocks, right?
    Thanks