HalCoGen TMS570LC4357 pinmux bug

Jiri,

I have passed your question to the HALCogen team. They will reply to you shortly.

Thanks and regards,

Zhaohong

I notice, that this bug is not fixed in new HalCoGen release 4.03.00
Did you pass this problem to your interl bug trace system?

I notice, that this bug is not fixed in new HalCoGen release 4.04.00
Did you pass this problem to your interl bug trace system?

This bug report is over 2 months old.

Hi Jiri,

Our apologies. From talking to Zhaohong, there hasn't been a CQ ticket entered.

If I understand the issue (by skimming what you pasted) there is an error in the way that the macro was written and ##state isn't getting substituted in the output by the preprocessor - it's literally dropping "##state' into the resulting code.
Is that basically the gist of the issue?

Best Regards,
Anthony

No. Problem is more simple. Generated code have wrong index into PINMUX array.

For example PINMUX_GIOA0_DMA_ENABLE need [175] but code contain invalid [170].
And it is came for all PINMUX_GIOxx_DMA_ macros.

Jiri

Got it - thanks Jiri,

CQ is sumbitted - ticket# is  SDOCM00115710.

These are all wrong..

#define PINMUX_GIOA0_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOA0_DMA_MASK) | (PINMUX_GIOA0_DMA_##state))        
                    
#define PINMUX_GIOA1_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOA1_DMA_MASK) | (PINMUX_GIOA1_DMA_##state))        

#define PINMUX_GIOA2_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOA2_DMA_MASK) | (PINMUX_GIOA2_DMA_##state))        

#define PINMUX_GIOA3_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOA3_DMA_MASK) | (PINMUX_GIOA3_DMA_##state))        

#define PINMUX_GIOA4_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOA4_DMA_MASK) | (PINMUX_GIOA4_DMA_##state))        

#define PINMUX_GIOA5_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOA5_DMA_MASK) | (PINMUX_GIOA5_DMA_##state))        

#define PINMUX_GIOA6_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOA6_DMA_MASK) | (PINMUX_GIOA6_DMA_##state))        

#define PINMUX_GIOA7_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOA7_DMA_MASK) | (PINMUX_GIOA7_DMA_##state))        
            
#define PINMUX_GIOB0_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOB0_DMA_MASK) | (PINMUX_GIOB0_DMA_##state))        
                    
#define PINMUX_GIOB1_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOB1_DMA_MASK) | (PINMUX_GIOB1_DMA_##state))        

#define PINMUX_GIOB2_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOB2_DMA_MASK) | (PINMUX_GIOB2_DMA_##state))        

#define PINMUX_GIOB3_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOB3_DMA_MASK) | (PINMUX_GIOB3_DMA_##state))        

#define PINMUX_GIOB4_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOB4_DMA_MASK) | (PINMUX_GIOB4_DMA_##state))        

#define PINMUX_GIOB5_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOB5_DMA_MASK) | (PINMUX_GIOB5_DMA_##state))        

#define PINMUX_GIOB6_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOB6_DMA_MASK) | (PINMUX_GIOB6_DMA_##state))        

#define PINMUX_GIOB7_DMA_ENABLE(state)      \
            (pinMuxReg->PINMUX[170] = (pinMuxReg->PINMUX[170] & PINMUX_GIOB7_DMA_MASK) | (PINMUX_GIOB7_DMA_##state))        

From the TRM it should be:
GIOA[0] DMA Request Select 3CCh PINMMR175[0]
GIOA[1] DMA Request Select PINMMR175[8]
GIOA[2] DMA Request Select PINMMR175[16]
GIOA[3] DMA Request Select PINMMR175[24]
GIOA[4] DMA Request Select 3D0h PINMMR176[0]
GIOA[5] DMA Request Select PINMMR176[8]
GIOA[6] DMA Request Select PINMMR176[16]
GIOA[7] DMA Request Select PINMMR176[24]
GIOB[0] DMA Request Select 3D4h PINMMR177[0]
GIOB[1] DMA Request Select PINMMR177[8]
GIOB[2] DMA Request Select PINMMR177[16]
GIOB3] DMA Request Select PINMMR177[24]
GIOB[4] DMA Request Select 3D8h PINMMR178[0]
GIOB[5] DMA Request Select PINMMR178[8]
GIOB[6] DMA Request Select PINMMR178[16]
GIOB[7] DMA Request Select PINMMR178[24]