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TMS570 Clock domain

Yang ShunFan
Intellectual 570 points
Other Parts Discussed in Thread: HALCOGEN, TMS570LS1227

Dear all,

I am learning how to turn on/off clock domain(TMS570LS1227). But when I turn off the VCLK4 by Halcogen, why the ePWM module are working normally.

Also I try to turn off GCLK and HCLK, but CPU are working normally, too. Could you help to clear the question.

 

1. Turn off VCLK4 on Halcogen.

2. Check the register. Verify the status. (The VCLK4 is turned off.)

3. However, the ePWM module are working normally. why?

Also,

1. I turn off the GCLK and HCLK, by Handcode. ( We can't trun off GCLK and HCLK by halcogen)

2. Check the register. Verify the status. (The GCLK and HCLK are turned off.)

3. However,  the CPU are normally to work following instruction. (x++)

  • 0
    TI__Guru 68980 points
    Hi Yang ShunFan, just to let you know I started looking at this post yesterday but got caught up confirming that the ePWMs do use VCLK4 as this isn't really clear in our datasheet. They do so will look now at the more clock disable question.
  • 0 in reply to Anthony F. Seely
    Intellectual 570 points

    Dear Anthony

    Thanks your reply. I have noticed this. I think VCLK4 is No.9 of  clock domain. 

    I am not sure whether your mean is this point, but please keep helping me for this question.

    Thank you.

    Best Regards,

    Fan 

  • 0 in reply to Yang ShunFan
    TI__Guru 68980 points
    Hi Fan,

    Yes, VCLK4 is bit 9 - documented in the datasheet but not TRM. We're going to enter some feedback so that the TRM gets fixed. Still need to go back though and look at the problem to see if I can reproduce it.

    Best Regarsd,
    Anthony
  • 0 in reply to Anthony F. Seely
    TI__Guru 68980 points
    Fan,

    We've been able to reproduce your results, where CDDIS indicates that the disable has been requested but the ePWM still keeps running.
    There is a handshake so writing to CDDIS just requests a power down. If the clocks are in use the peripherals can hold the clock active.

    We're not sure exactly what the reasons are that CDDIS is being held, but in the meantime you can individually shut the clocks off to each e* timers by writing to the PINMMR registers 37,38,39,40. I confirmed that this shuts them off.

    These registers are protected by a kicker mechanism, and before you write to them you need to unlock them by doing this:

    kickerReg->KICKER0 = 0x83e70b13;
    kickerReg->KICKER1 = 0x95a4f1e0;

    Then you can write to them.

    The bitfields of these registers and which timers they correspond to are documented in the device TRM section 4.5.8, 4.5.9, and 4.5.10.
    It may be that shutting them off individually in this PINMMR is enough to release the CDDIS and allow the whole domain to shut down.
    I'm not sure though and need to think of an experiment to distinguish, because for practical purposes the clock to the ePWMs get shut off immediately and when writing to the PINMMR and then if the CDDIS does take effect I don't know what the 'sign' of that would actually be.
  • 0 in reply to Anthony F. Seely
    TI__Guru 68980 points
    Hi Fan,

    Wondering if you were able to make this work?
  • 0 in reply to Anthony F. Seely
    Intellectual 570 points
    Hi Anthony,

    Thanks your help. This week is Chinese new year, so I am late to verify it.

    Best Regards,
    Fan