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Recommendations on unused pins configuration

Dennis Begun
Intellectual 825 points
Other Parts Discussed in Thread: TM4C1294NCPDT

Are there any recommendations regarding configuring unused pins? Is it safer configuring them as output, for instance? Is it better not to configure them at all?

Hardware-wise, is it recommended leaving unused pins as is, or maybe connecting them to VDD/GND by a pull-up/pull-down resistor?

  • 0
    Guru 86755 points

    Dennis Begun said:
    Hardware-wise, is it recommended leaving unused pins as is, or maybe connecting them to VDD/GND by a pull-up/pull-down resistor?

    See, "Connections for Unused Signals" at your Tiva MCU datasheet.

    - kel

  • 0 in reply to Markel Robregado
    Intellectual 920 points

    I have a similar question, but the Connections for Unused Signals section on my TM4C129 datasheet does not explicitly answer it.  On several ports I have one or two GPIO pins that are unused, but the ports themselves are enabled (corresponding bit in the RCGCx register set).  Is it best to leave these pins in the reset (input) state or set them as outputs and drive them low?

  • 0 in reply to Jim Gavin
    TI__Guru**** 244400 points
    Hello Jim,

    As the section for Unused Signals mention, they can be left NC, but preferred practice is to connect them to GND (then they can be left in the input state or driven 0, which will not affect the device).

    regards
    Amit
  • 0 in reply to Amit Ashara
    Prodigy 30 points

    Amit,

    With previous non-Tiva designs I took a conservative approach and pulled ALL configurable IOs to a known state to avoid CMOS input structures from pulling greater than normal current.  Tiva documentation is clear that it is possible for software to configure Tiva IOs to use internal resistors to pull GPIOs to Vcc or ground to avoid the well known floating CMOS inputs = higher I(in) situation.  However, there may be scenarios in my application where it may be an extended period of time before Tiva is released from reset, thus prolonging the time that the Tiva GPIOs are in an undefined state.

    In the Tiva™ TM4C1294NCPDT Microcontroller DATA SHEET document if find a statement that sounds like asserting reset will initialize the GPIO structure to a state that essentially is neither an output  nor an input, i.e., 

    "The GPIODEN register is the digital enable register. By default, all GPIO signals except those listed below are configured out of reset to be undriven (tristate). Their digital function is disabled; they do not drive a logic value on the pin and they do not allow the pin voltage into the GPIO receiver. To use the pin as a digital input or output (either GPIO or alternate function), the corresponding GPIODEN bit must be set."

    (my emphasis)

    Does this mean that external resistors pulling IOs to a known state is not only unnecessary but totally ineffective (i.e., the internal structure controlled by GPIODEN that disconnects the digital drivers/receiver isolates the driver/receiver from my resistor connected to the IO pad)?... or is it a good practice even with Tiva?

  • 0 in reply to Rick Carrell
    Guru 47900 points
    Not being an "insider" and enjoying access to "Restricted Tech Info" - I cannot comment beyond saluting you for this razor-sharp detail. I cannot recall such detail w/in (past) LM3S or LX4F data sheets.

    I must take issue w/vendor's statement, "preferred practice is to connect them to GND." Most always - when clients have made such "hard connection to ground" (via pcb trace or via) at some point user will, "Need just one or two more pins - and nightmare hack thus results!"
    The remedy is the use of an external, pull-down resistor - which is easily removed so that the (presently) unneeded pin may be (later) harvested.
  • 0 in reply to cb1
    Guru 10570 points
    Agreed on both counts with cb1.

    Resistors are cheap and small. Resistor packs even more so. My general rules of best practice would be

    Always put pullups or downs on unused inputs even if the data sheet claims it unnecessary. Only float inputs when required for proper operation.

    If there is room also provide for a header for these unused pins. It does not need to be populated and so costs only space.

    Add power an ground to these headers. Even when not used in production they are good points for test probes. MSOs often have probes that fit directly on the pins of 0.1" headers, easy and secure probing.

    To that last point add headers where possible for probing, you may be restricted by space or signal quality but they are useful when present.

    One final addition to cb1's note that unused pins will find a need to be used, the corollary is that a shorted pin will be converted to an output an driven into the short.

    Robert
  • 0 in reply to Robert Adsett72
    Guru 10570 points
    Best practice used to be pullups because of the asymmetry in TTL thresholds.

    I think what drives the TI pull down recommendation is their lockup errata. You should look at that and make sure you have the appropriate sprinkling of a double handful of capacitors.

    Robert
  • 0 in reply to Rick Carrell
    TI__Guru**** 244400 points
    Hello Rick,

    The GPIODEN will disconnect the path from the IO to the receiver. However having the external pull control on the IO would mean that the path from the IO to the receiver when enabled would be in a known state especially for the input IO's.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Guru 117855 points

    Amit Ashara said:
    The GPIODEN will disconnect the path from the IO to the receiver.

    Hi Amit,

    Surely many here wonder - if that "path disconnect" adds "user cost/component & consideration burden" - and if similar (enemy) ARM MCUs & past LM3S/LX4F (RIP) - escaped such (questionable) "feature" - why was such "path disconnect" implemented?   

    As presented here - minus explanation & justification - this (disconnect) behavior represents a vulnerability w/out (any) apparent gain!

  • 0 in reply to cb1_mobile
    Prodigy 30 points

    Is the following generalization accurate?

    As long as  digital functionality is disabled (GPIODEN.DIN = 0) Tiva IO pads will not be subject to the well known floating CMOS = increased current malady.  Once the digital functionality is enabled it is the user's responsibility to insure that Tiva IO pins do not float.

    Test use case:

    It is acceptable to leave the digital functionality disabled on IO pads for extended periods of time (days/months/years) without any ill effect, including increased power dissipation as well as reduced device reliability/longevity.

  • 0 in reply to Rick Carrell
    TI__Guru**** 244400 points
    Hello Rick,

    While it is acceptable to leave the digital function disabled on the IO, the issue more pressing is the fact that a fast transient due to ESD event may cause a latch up on the pad.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Prodigy 30 points
    Understood. Assume that ESD protection is in place, e.g., transient voltage suppressors.

    Any other concerns?
  • 0 in reply to Rick Carrell
    TI__Guru**** 244400 points
    Hello Rick

    Assuming ESD protection in place, I don't think so. Also since in you previous post you mentioned current consumption, for hibernate mode current measurement all the IO are kept in input with Pull down enabled. I would like that to be taken into consideration from the s/w design of the unused pins.

    Regards
    Amit