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TMS570LC4357 - pin state during the reset

Jiri Janacek
Genius 3315 points

Dear all,

unfortunately I have not found an answer to a simple question in the datasheet SPNS195A or in the TRM SPNU563.

Is defined and guaranteed pin/ball state during the reset (regardless the cause of the reset - power reset, warm reset, SW reset,...)? I would suppose that all the balls will be in the tri-state (high impedance), is that right?

Thanks a lot,

Best regards, Jiri

  • 0
    TI__Guru 68920 points

    Hi Jiri,

    This is mostly the case, but on some interfaces like EMIF and FlexRay it may be different... some pins are by default OUTPUTs.

    I'll thought we did have this information in the datasheet but let me see and get back to you.


    EDIT: 

    Jiri -

    I talked this over w. one of my colleagues who sources a lot of the datasheet content. 

    There isn't a simple 'table' format to answer your question but there is a NOTE in section 3.2 of SPNS195A that explains how to interpret the terminal functions table information to get the answer to your question. 

    The rules are different for pins listed as I/O versus those listed as OUTPUT in the terminal functions table,  and this is what the note explains.