I am using the motion controller PWM fault capabilities on my TM4C processor. As demonstrated below, I have set up an external fault pin to trigger the fault on the MxFaultn pin. This pin will go low when a fault is present. I then want to processor to latch the generator pwm pin low until the Fault Clear function has been called). I am stuck on where I should nest the ROM_PWMGenFaultClear function call to ensure the fault latch is cleared. Is there an ISR that my processor enters when a fault is triggered?
ROM_PWMGenConfigure(PWM0_BASE, PWM_GEN_0, (PWM_GEN_MODE_UP_DOWN |
PWM_GEN_MODE_NO_SYNC | PWM_GEN_MODE_FAULT_EXT |
PWM_GEN_MODE_FAULT_LATCHED | PWM_GEN_MODE_DBG_STOP));
ROM_PWMGenFaultConfigure(PWM0_BASE, PWM_GEN_0, 100, PWM_FAULT0_SENSE_LOW);
ROM_PWMGenFaultTriggerSet(PWM0_BASE, PWM_GEN_0, PWM_FAULT_GROUP_0, PWM_FAULT_FAULT0);
ROM_PWMOutputFault(PWM0_BASE, PWM_OUT_0_BIT, TRUE);
ROM_PWMOutputFaultLevel(PWM0_BASE, PWM_OUT_0_BIT, FALSE);