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Questions about CCM-R4F in a TMS570LS3137

Marcos Diaz
Prodigy 155 points

Other Parts Discussed in Thread: TMS570LS3137

Hello everyone! I'd like to ask you a couple of questions about the CPU Compare Module of the TMS570LS3137:

1) Is there any way to disable it for testing purposes? If not, is there any way to prevent it from raising an FIQ when there's a compare error?

2) Is there any way to force a Compare Error to occur without enabling Error Forcing Mode? I'm trying to use the following instructions right after enabling the FPU (but without initializing the FP registers):

vstmdb.64 sp!, {d0-d15}
vldmia.64 sp!, {d0-d15}

According to the datasheet, storing the FP registers in the stack without having initialized them will result in a Compare Error being raised. However, this doesn't seem to be the case, as I can execute those instructions normally without nERROR being asserted. I did notice, though, that it seems to happen when the OS I'm using pushes them because of a context switch.

Thanks a lot!

  • 0
    TI__Mastermind 22375 points

    Marcos,

    1] The CCM-R4F will compare all the time unless you put the CCM-R4F in test mode and leave it in test mode.
    In this test mode, it will not check and report any error.


    Also, out of reset, the CPU is FIQ disable, so even if CCM-R4F reports an error, it will not interrupt the CPU. (The nERROR pin will be activated)


    Once FIQ are enable, (By software) they can't be disable anymore (NMI mode). Only a CPU reset will disable FIQ.

    2] The reason we recommend to initialize all CPU and FPU registers is because there is no guaranty to predict their reset condition.
    In other hands, there is no guaranty that 100% of the time you will get an error if you don't initialize the CPU and FPU registers.

  • 0 in reply to Jean-Marc Mifsud
    Prodigy 155 points

    Jean-Marc Mifsud said:

    Marcos,

    1] The CCM-R4F will compare all the time unless you put the CCM-R4F in test mode and leave it in test mode.
    In this test mode, it will not check and report any error.


    Also, out of reset, the CPU is FIQ disable, so even if CCM-R4F reports an error, it will not interrupt the CPU. (The nERROR pin will be activated)


    Once FIQ are enable, (By software) they can't be disable anymore (NMI mode). Only a CPU reset will disable FIQ.

    2] The reason we recommend to initialize all CPU and FPU registers is because there is no guaranty to predict their reset condition.
    In other hands, there is no guaranty that 100% of the time you will get an error if you don't initialize the CPU and FPU registers.

    Thanks a lot for your answer.

    1) Indeed, Self-Test mode seems to be what we need.

    2) Yes, but the weird thing is that if I do the store twice (once in main and once in my interrupt handler, which I'm 100% sure isn't being accessed before main), it'll always fail in the interrupt handler. Does it have anything to do with the processor mode (SVC in main vs IRQ in the handler)?