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Flash a bootloader and main program

Other Parts Discussed in Thread: TMS570LS1224, HALCOGEN

Hi,

 

I am using the TMS570LS1224 and CCS 6.

I have a (bare) bootloader written, which will eventually be able to update the main program over a serial connection with a DSP. I also have a main program written. So right now I am just trying to get it set up so that I have both the bootloader and main program flashed, and that when I boot, the bootloader runs, and then runs the main program, and if the software causes a reset that the bootloader runs again.

 

However, it looks like I can only have one of the programs flashed at a time.  In the debug configurations for each program I have tried under Flash Settings to Erase only necessary sectors, but this doesn't work.  I also tried selected sectors only, and for the bootloader selected Bank 0 sectors 0-6, and for the main selected everything else.  The bootloader gets flashed OK, but when I try to flash the main I get the error below

 

 

How can I do this?

Thanks,

David

 

My linker files are below:

Bootloader

--retain="*(.intvecs)"

/* USER CODE BEGIN (1) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
    VECTORS (X)  : origin=0x00000000 length=0x00000020
    FLASH0  (RX) : origin=0x00000020 length=0x0001FFE0
    STACKS  (RW) : origin=0x08000000 length=0x00003500
    RAM     (RW) : origin=0x08003500 length=0x0002cb00

/* USER CODE BEGIN (2) */
/* USER CODE END */
}

/* USER CODE BEGIN (3) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    .intvecs : {} > VECTORS
    .text    : {} > FLASH0 
    .const   : {} > FLASH0 
    .cinit   : {} > FLASH0 
    .pinit   : {} > FLASH0 
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM
    

/* USER CODE BEGIN (4) */
/* USER CODE END */
}

Main

--retain="*(.intvecs)"

/* USER CODE BEGIN (1) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
    VECTORS (X)  : origin=0x00000000 length=0x00000020
    FLASH0  (RX) : origin=0x00020000 length=0x0013E000
    STACKS  (RW) : origin=0x08000000 length=0x00003500
    RAM     (RW) : origin=0x08003500 length=0x0002cb00

/* USER CODE BEGIN (2) */
/* USER CODE END */
}

/* USER CODE BEGIN (3) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    .intvecs : {} > VECTORS
    .text    : {} > FLASH0 
    .const   : {} > FLASH0 
    .cinit   : {} > FLASH0 
    .pinit   : {} > FLASH0 
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM
    

/* USER CODE BEGIN (4) */
/* USER CODE END */
}

 

 

  • I think I have it (more) figured it out, but I'd like to verify this is the right way

    I enabled the Range option, for my main program I enabled ranges
    0x00020000-0x0013FFFF,0xF0200000-0xF020FFFF

    For my bootloader I enabled
    0x0000000-0x0001FFE0

    Of course now my main program is crashing, which it didn't used to...so something still isn't right, but I checked memory and after flashing the bootloader and then the main, the bootloader flash area is the same, so that is progress.

  • Hi David,

    There is a long thread talking about bootloader here: 

    Mainly your problem is, the intvecs table for your bootloader and your main is mapped at address 0x0000_0000. So if you program the bootloader first and your main second, you have to erase sector 0 again.

    In our bootloader example, the intvecs table for the bootloader is mainly a jump to the main intvecs table for your main.

    Main

    --retain="*(.intvecs)"
    
    /* USER CODE BEGIN (1) */
    /* USER CODE END */
    
    /*----------------------------------------------------------------------------*/
    /* Memory Map                                                                 */
    
    MEMORY
    {
        VECTORS (X)  : origin=0x00020000 length=0x00000020
        FLASH0  (RX) : origin=0x00020020 length=0x0013FFE0
        STACKS  (RW) : origin=0x08000000 length=0x00003500
        RAM     (RW) : origin=0x08003500 length=0x0002cb00
    
    /* USER CODE BEGIN (2) */
    /* USER CODE END */
    }
    /* USER CODE BEGIN (3) */
    /* USER CODE END */
    
    
    /*----------------------------------------------------------------------------*/
    /* Section Configuration                                                      */
    
    SECTIONS
    {
        .intvecs : {} > VECTORS
        .text    : {} > FLASH0 
        .const   : {} > FLASH0 
        .cinit   : {} > FLASH0 
        .pinit   : {} > FLASH0 
        .bss     : {} > RAM
        .data    : {} > RAM
        .sysmem  : {} > RAM
        
    
    /* USER CODE BEGIN (4) */
    /* USER CODE END */
    }

    The code for your bootloader exception table will be something like:

    .sect ".intvecs"


    ;-------------------------------------------------------------------------------
    ; import reference for interrupt routines

    .ref _c_int00

    ;-------------------------------------------------------------------------------
    ; interrupt vectors
    ; Please change the #0x???? for your specified image location defined in bl_config.h

      b _c_int00 ;0x00
      b #0x1FFF8 ;0x04
      b #0x1FFF8 ;0x08, Software interrupt
      b #0x1FFF8 ;0x0C, Abort (prefetch)
      b #0x1FFF8 ;0x10, Abort (data)
    reservedEntry
      b reservedEntry ;0x14
      b #0x1FFF8 ;0x18 ldr pc,[pc, #-0x1b0] 
      b #0x1FFF8 ;0x1C ldr pc,[pc, #-0x1b0]

     

    With _c_int00  the entry point of the bootloader,
    The line in green are for a specific case (discussed in detail in the mentioned thead, but could also be:

      ldr pc,[pc, #-0x1b0]
      ldr pc,[pc, #-0x1b0]

     All other exception will branch to the table for your main and will look like:

    .sect ".intvecs"
    .arm

    ;-------------------------------------------------------------------------------
    ; import reference for interrupt routines

    .ref _c_int00
    .ref _dabort
    .ref phantomInterrupt
    .def resetEntry

    ;-------------------------------------------------------------------------------
    ; interrupt vectors

    resetEntry
         b _c_int00
    undefEntry
         b undefEntry
    svcEntry
         b svcEntry
    prefetchEntry
         b prefetchEntry
         b _dabort
         b phantomInterrupt
         ldr pc,[pc,#-0x1b0]
         ldr pc,[pc,#-0x1b0]

     

    Please let me know if this clarify your question.
  • Hi Jean-Marc,

    Thanks for your response. I've read through the thread you linked and am working through getting everything set up. I'll post again once I have more information on whether I got it working or not.

    I am using ucos ii in my main app, so the sys_intvecs.asm is a bit different, but I assume the concept should apply. One thing I am struggling with is modifying the Interrupts tab in Halcogen for my bootloader to generate code that resembles what you posted. The generated code creates import references for all of the interrupt vectors, and is expecting symbols, not #0xXXXX, but even when I remove all the .ref codes except for _c_int00 I get an error on the line
    b reservedEntry
    saying the symbol is undefined.

    Thanks for your help and patience...I haven't gotten into linker files before.

    David
  • David,

    For reference, this other thread about bootloader was also using UCOSIII in the main application.

    This is the reason why I had to change the bootloader intvecs for IRQ and FIQ.

    Also, not sure if you got the point, but because of UCOS, the bootloader should not enable the IRQ VIC mode.
    RTOS wants to intercept and than dispatch all IRQ. So I had to comment out in our bootloader startup code the call to _coreEnableIrqVicOffset_().

  • Hi,

    I am still having trouble getting my bootloader to jump to my main application.  The bootloader is set up and can successfully flash the main program.

    I don't understand where the number #0x1FFF8 comes from.  Also, I'm having trouble getting Halcogen to generate a sys_intvecs.asm file that matches what you posted.

     

    The bootloader starts at address 0x00000000 and goes until 0x0001FFFF.  My main app starts at 0x00020000, so when I try to jump to my main app the code is

        transferAddress = (uint32_t)PROGRAMFLASH_BEGIN_ADDRESS;
        ((void (*)(void))transferAddress)();
    
    where #define PROGRAMFLASH_BEGIN_ADDRESS      0x00020000L
    
    
    Main linker file:
    
    --retain="*(.intvecs)"
    
    /* USER CODE BEGIN (1) */
    /* USER CODE END */
    
    /*----------------------------------------------------------------------------*/
    /* Memory Map                                                                 */
    
    MEMORY
    {
        VECTORS (X)  : origin=0x00020000 length=0x00000020
        FLASH0  (RX) : origin=0x00020020 length=0x0011FFE0
        STACKS  (RW) : origin=0x08000000 length=0x00003500
        RAM     (RW) : origin=0x08003500 length=0x0002cb00
    
    /* USER CODE BEGIN (2) */
    /* USER CODE END */
    }
    
    /* USER CODE BEGIN (3) */
    /* USER CODE END */
    
    
    /*----------------------------------------------------------------------------*/
    /* Section Configuration                                                      */
    
    SECTIONS
    {
        .intvecs : {} > VECTORS
        .text    : {} > FLASH0
        .const   : {} > FLASH0
        .cinit   : {} > FLASH0
        .pinit   : {} > FLASH0
        .bss     : {} > RAM
        .data    : {} > RAM
        .sysmem  : {} > RAM
    
    
    /* USER CODE BEGIN (4) */
    /* USER CODE END */
    }
    
    
    
    
    
    Bootloader linker file:
    
    --retain="*(.intvecs)"
    
    
    /*----------------------------------------------------------------------------*/
    /* Memory Map                                                                 */
    
    MEMORY
    {
        VECTORS 	(X)  : origin=0x00000000 length=0x00000020
        FLASH_API  	(RX) : origin=0x00000020 length=0x000014E0
        FLASH0  	(RX) : origin=0x00001500 length=0x0001EB00
        STACKS  	(RW) : origin=0x08000000 length=0x00003500
        RAM     	(RW) : origin=0x08003500 length=0x0002cb00
    
    }
    
    
    /*----------------------------------------------------------------------------*/
    /* Section Configuration                                                      */
    
    SECTIONS
    {
        .intvecs : {} > VECTORS
        flashAPI :
        {
         --library= F021_API_CortexR4_BE.lib (.text)
       	} load = FLASH_API, run = RAM, LOAD_START(api_load), RUN_START(api_run), SIZE(api_size)
    
        .text    : {} > FLASH0 
        .const   : {} > FLASH0 
        .cinit   : {} > FLASH0 
        .pinit   : {} > FLASH0
        FEE_TEXT_SECTION : {} > FLASH0
        FEE_CONST_SECTION : {} > FLASH0
        .bss     : {} > RAM
        .data    : {} > RAM
        .sysmem  : {} > RAM
        FEE_DATA_SECTION : {} > RAM
    
    }