Hello Team,
Can you explain me what is the SPI Enable ("SPI2ENA") used for on the Micro SD Card slot ?- http://processors.wiki.ti.com/images/e/ec/TMS570LS31x_HDK_Schematics_RevE.pdf
Thanks.
Regards,
Varban
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Hello Team,
Can you explain me what is the SPI Enable ("SPI2ENA") used for on the Micro SD Card slot ?- http://processors.wiki.ti.com/images/e/ec/TMS570LS31x_HDK_Schematics_RevE.pdf
Thanks.
Regards,
Varban
Hello KARTHIKEYAN and Jean-Marc,
We have developed a motherboard for the TMS570LS3137 HDK and we have placed a microSD Card slot on it, connected to the mibSPI1.
Unfortunately, it is not working. The register configurations for SPI2 (the working one, where the default SD card slot is connected) and mibSPI1 are the same. I even tried to connect the new SD card slot to the working SPI2... and the results were the same - sometimes I could read from it but nothing can be written. /The same SD card is used in both slots/
Since the register configurations are correct, the signals on the oscilloscope also look the same, the only thing remaining to suspect for the improper operation of the SD card is the SPI ENA pin - which is included on the HDK board.
Any ideas are welcome... I really do need to get the second SD card on mibSPI1 interface working.
Kind regards,
Varban
Karthik,
Here you are:
/** bring SPI out of reset */
spiREG2->GCR0 = 1U;
/** SPI2 master mode and clock configuration */
spiREG2->GCR1 = (0 << 24) /* SPIEN must be enabled after all other configurations */
| (0 << 16) /* LOOPBACK */
| (0 << 8) /* PWERDOWN */
| (1 << 1) /* CLKMOD = output */
| (1 << 0); /* MASTER mode */
/** default value for SPI chip selects */
spiREG2->CSDEF = 0x0F;
/** dissable SPI2 multibuffered mode */
spiREG2->MIBSPIE = 0U;
/** SPI3 enable pin configuration */
/** - set interrupt levels */
spiREG2->LVL = (0 << 9) /* TXINT */
| (0 << 8) /* RXINT */
| (0 << 6) /* OVRNINT */
| (0 << 4) /* BITERR */
| (0 << 3) /* DESYNC */
| (0 << 2) /* PARERR */
| (0 << 1) /* TIMEOUT */
| (0 << 0); /* DLENERR */
/** - enable (no) interrupts */
spiREG2->INT0 = (0 << 9) /* TXINT */
| (0 << 8) /* RXINT */
| (0 << 6) /* OVRNINT */
| (0 << 4) /* BITERR */
| (0 << 3) /* DESYNC */
| (0 << 2) /* PARERR */
| (0 << 1) /* TIMEOUT */
| (0 << 0); /* DLENERR */
/** no Delays */
spiREG2->DELAY = (50 << 24) /* C2TDELAY */
| (50 << 16) /* T2CDELAY */
| (0 << 8) /* T2EDELAY */
| (0 << 0); /* C2EDELAY */
/** - Data Format 0 */
spiREG2->FMT0 = (0 << 24) /* wdelay */
| (0 << 23) /* parity Polarity */
| (0 << 22) /* parity enable */
| (0 << 21) /* wait on enable */
| (0 << 20) /* shift direction. 0=MSB fist */
| (0 << 18) /* dis CS timers */
| (0 << 17) /* clock polarity */
| (1 << 16) /* clock phase */
| (0xC7 << 8) /* baudrate prescale */ // 80MHz/200=400khz, check if the SPI clock is below 1 MHz)
| 8; /* baudrate prescale */ // check if the SPI clock is below 1 MHz)
/* data word length */
/** - SPI2 Port output values */
// These values are only needed when pin is configued as GPIO */
spiREG2->PCDOUT = 0 /* SCS[0] */
| (1 << 1) /* SCS[1] */ // CS1 = high
| (0 << 2) /* SCS[2] */
| (1 << 3) /* SCS[3] */
| (0 << 8) /* ENA */
| (0 << 9) /* CLK */
| (1 << 10) /* SIMO */
| (1 << 11); /* SOMI */
/** - SPI2 Port direction */
spiREG2->PCDIR = 1 /* SCS[0] */
| (0 << 1) /* SCS[1] */ // CS1 is an output
| (0 << 2) /* SCS[2] */
| (1 << 3) /* SCS[3] */
| (0 << 8) /* ENA */
| (1 << 9) /* CLK */
| (1 << 10) /* SIMO */
| (1 << 11); /* SOMI */
/** - SPI2 Port open drain enable */
spiREG2->PCPDR = 0 /* SCS[0] */
| (0 << 1) /* SCS[1] */
| (0 << 2) /* SCS[2] */
| (0 << 3) /* SCS[3] */
| (0 << 8) /* ENA */
| (0 << 9) /* CLK */
| (0 << 10) /* SIMO */
| (0 << 11); /* SOMI */
/** - SPI2 Port pullup / pulldown selection */
spiREG2->PCPSL = 1 /* SCS[0] */
| (1 << 1) /* SCS[1] */
| (1 << 2) /* SCS[2] */
| (1 << 3) /* SCS[3] */
| (1 << 8) /* ENA */
| (1 << 9) /* CLK */
| (1 << 10) /* SIMO */
| (1 << 11); /* SOMI */
/** - SPI2 Port pullup / pulldown enable*/
spiREG2->PCDIS = 0 /* SCS[0] */
| (0 << 1) /* SCS[1] */
| (0 << 2) /* SCS[2] */
| (0 << 3) /* SCS[3] */
| (0 << 8) /* ENA */
| (0 << 9) /* CLK */
| (0 << 10) /* SIMO */
| (0 << 11); /* SOMI */
/* SPI2 set all pins to functional */
spiREG2->PCFUN = 0 /* SCS[0] */
| (0 << 1) /* SCS[1] */ // SD card CS is handled as IO
| (0 << 2) /* SCS[2] */ // CS of touch screen controller
| (0 << 3) /* SCS[3] */
| (0 << 8) /* ENA */
| (1 << 9) /* CLK */
| (1 << 10) /* SIMO */
| (1 << 11); /* SOMI */
/** SPI2 master mode and clock configuration */
spiREG2->MIBSPIE = 0; // make sure that SPI is in compatibility mode
/** SPI2 master mode and clock configuration */
spiREG2->GCR1 |= (1 << 24);
/** - Finaly start SPI2 */
spiREG2->ENA = 1U;
And thanks for your support and the fast response!
Best Regards,
Varban
Hello,
Unfortunately, the SPI2ENA pin is not present on the board. The J10 pinout scheme from http://processors.wiki.ti.com/images/e/ec/TMS570LS31x_HDK_Schematics_RevE.pdf seems to correspond to the actual pinouts on my HDK kit (I have CS1 or SIMO on that pin number).
So... I cannot check the actual state - HIGH/LOW, input/output.
Regards,
Varban
Hello Karthik,
I am still experimenting with the HDK.
I will inform you about my progress as soon as I have tested all the scenarios I can think of.
Thank you for the support.
Kind Regards,
Varban