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Does RM48 have the self-test function for the core register of MCU?

ByMH
Prodigy 30 points
Other Parts Discussed in Thread: RM48L952, HALCOGEN

Dear,

I'm wondering whether there's a self-test function for core register. For example self-test for R0, R1, ... , SPSR and so on.

I tried to find the mentioning of the function but didn't find about 'core register'.

Please let me know if there's such a function or module in RM48L952.

BR,

BM

  • 0
    TI__Mastermind 49120 points
    Hello,

    The CPU self-test function is scan-based and tests individual transistors, including those used for the user-accessible registers. The amount of test coverage achieved is dependent on the number of test intervals run.

    Regards,
    Sunil
  • 0 in reply to Sunil Oak
    Prodigy 30 points

    Hello Sunil,

    Actually, the reason why I'm trying to find such a function is in order to meet safety standard. So we need to get some documents which explain self-test for core register of the ARM CPU or make the document ourselves.

    I don't understand well about your reply, especially 'The amount of test coverage achieved is dependent on the number of test intervals run'. You mean that we don't need to conduct some additional test in the code for testing core register?

    BRs,

    BM

  • 0 in reply to ByMH
    TI__Mastermind 49120 points
    Hello,

    That is correct. You don't need to run additional tests for the CPU registers. You only need to choose the number of CPU self-test intervals and trigger the CPU self-test. The actual routine to trigger the CPU self-test is (optionally) generated by HALCoGen as part of the start-up sequence.

    Regards,
    Sunil
  • 0 in reply to Sunil Oak
    Prodigy 30 points
    Sunil,

    I tried to trigger the cpu self-test via HALCoGen, but didn't find where the checkbox or dropdown menu for choosing cpu self-test intervals is. Could you kindly explain or describe which section includes the option for self-test interval?
    Additionally, is there any documentation described the core register testing inside cpu self-test? I would state the section(or clause) of the document as evidence that we're doing core register testing.

    BRs,
    BM