1. Is there any particular delay to be added after enabling the clock & before accessing the registers.
2. I have checked some examples, it uses 3 to 5 clock cycles. Does 3-5 cycles are independent of system clock. E.g if I have 16mhz sysclock & 80Mhz clock, then in both cases will delay cycles will always be 3-5 or they will change?
3. Can I use standard, 5 NOP's.
