I have wrote GPIO configuration for tm4c123gh6pm. is below sequence correct. Does any additional register need to be configured or rest of GPIO registers are don't care for input & output
1. Pin as Input pull up
/* PF0 as input pull up */ SYSCTL->RCGCGPIO |= REG32_BIT_5; /* enable PORTF clock */ while(! (SYSCTL->PRGPIO & REG32_BIT_5)); /* while periph ready */ SYSCTL->GPIOHBCTL |= REG32_BIT_5; /* enable access to AHB bus */ GPIOF_AHB->LOCK = 0x4c4f434bU; /* write lock key */ GPIOF_AHB->CR |= REG32_BIT_0; /* enable write to PF0 pin */ GPIOF_AHB->DIR &= (u32_t)(~REG32_BIT_0); /* make as input */ GPIOF_AHB->AFSEL &= (u32_t)(~REG32_BIT_0); /* used as GPIO */ GPIOF_AHB->PUR |= REG32_BIT_0; /* pull up enabled */ GPIOF_AHB->PDR &= (u32_t)(~REG32_BIT_0); /* pull down disabled */ GPIOF_AHB->ODR &= (u32_t)(~REG32_BIT_0); /* not open drain */ GPIOF_AHB->AMSEL &= (u32_t)(~REG32_BIT_0); /* analog function disabled */ GPIOF_AHB->DEN |= REG32_BIT_0; /* digital function enabled */
2. Pin as output
/* PF1 as output low */ SYSCTL->RCGCGPIO |= REG32_BIT_5; /* enable PORTF clock */ while(! (SYSCTL->PRGPIO & REG32_BIT_5)); /* while periph ready */ SYSCTL->GPIOHBCTL |= REG32_BIT_5; /* enable access to AHB bus */ GPIOF_AHB->DATA &= (u32_t)(~REG32_BIT_1); /* pin low on output */ GPIOF_AHB->DIR |= REG32_BIT_1; /* make as output */ GPIOF_AHB->AFSEL &= (u32_t)(~REG32_BIT_1); /* used as GPIO */ GPIOF_AHB->PUR &= (u32_t)(~REG32_BIT_1); /* pull up disabled */ GPIOF_AHB->PDR &= (u32_t)(~REG32_BIT_1); /* pull down disabled */ GPIOF_AHB->ODR &= (u32_t)(~REG32_BIT_1); /* not open drain */ GPIOF_AHB->AMSEL &= (u32_t)(~REG32_BIT_1); /* analog function disabled */ GPIOF_AHB->DR8R &= (u32_t)(~REG32_BIT_1); /* 8mA drive disable */ GPIOF_AHB->DR4R &= (u32_t)(~REG32_BIT_1); /* 4mA drive disable */ GPIOF_AHB->DR2R |= REG32_BIT_1; /* 2mA drive enable */ GPIOF_AHB->SLR &= (u32_t)(~REG32_BIT_1); /* slew disabled */ GPIOF_AHB->DEN |= REG32_BIT_1; /* digital function enabled */
3. What is slew control used for when drive is 8mA.