HalCoGen DMM registers - wrong port address

Hi Jiri，

The dmmPORT in reg_dmm.h generated by HalCoGen 4.03 is defined properly:

/** @def dmmPORT

* @brief DMM Port Register Pointer
*
* Pointer used by the GIO driver to access I/O PORT of DMM
* (use the GIO drivers to access the port pins).
*/
#define dmmPORT ((gioPORT_t *)0xFFFFF770U)

Regards,

QJ

Hello QJ,

you are right! Anyway I am surprised of a HalCoGen behaviour.

If I create a new project by HalCoGen 04.03.00, the mentioned address is the correct one.

But I have worked on the existing source code (I cannot recall by which HalCoGen version that was generated) with the version 04.03.00 - although I have re-generated source code the content of the reg_dmm.h has been re-written just partly:

* comments in the file title/header has been updated - it really declares the version 04.03.00 as expected,

* but the DMM port address remains without any update - at the wrong value.

This is not a major HalCoGen issue but I would not identify that as the feature ;-)

Best regards,

Jiri

Hello QJ,

there is the proper address generated for the TMS570LS3137 device but code generated by HalCoGen 4.04.00 for the TMS570LC4357 device still contains a wrong value 0xFFFFF738.

Please may you submit a bug ticket for the next HCG release within your tracking system?

Thanks a lot in advance,
Best regards, Jiri

Jiri,

It looks like the problem is in the .cnf files:

 C:\ti\Hercules\HALCoGen\v04.04.00\config\TMDXRM48HDK.cnf (2 hits)

Line 14143: VAR.DMM_BASE.DEFAULT=0xFFFFF700

Line 14144: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF770

 C:\ti\Hercules\HALCoGen\v04.04.00\config\TMDXRM48USB.cnf (2 hits)

Line 14142: VAR.DMM_BASE.DEFAULT=0xFFFFF700

Line 14143: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF770

 C:\ti\Hercules\HALCoGen\v04.04.00\config\TMS570DC4457ZWT.cnf (2 hits)

Line 21450: VAR.DMM_BASE.DEFAULT=0xFFFFF700

Line 21451: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738

 C:\ti\Hercules\HALCoGen\v04.04.00\config\TMS570LC4357ZWT.cnf (2 hits)

Line 17694: VAR.DMM_BASE.DEFAULT=0xFFFFF700

Line 17695: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738

 C:\ti\Hercules\HALCoGen\v04.04.00\config\TMS570LC4357ZWT_FREERTOS.cnf (2 hits)

Line 17707: VAR.DMM_BASE.DEFAULT=0xFFFFF700

Line 17708: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738

 C:\ti\Hercules\HALCoGen\v04.04.00\config\TMS570LS0232PZ.cnf (2 hits)

Line 13398: VAR.DMM_BASE.DEFAULT=0xFFFFF700

Line 13399: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF770

Actually it appears 13 parts have this configured wrong

Search "VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738" (13 hits in 13 files)
  C:\ti\Hercules\HALCoGen\v04.04.00\config\RM46L430PGE.cnf (1 hit)
    Line 14148: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\RM46L440PGE.cnf (1 hit)
    Line 14148: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\RM46L450PGE.cnf (1 hit)
    Line 14148: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\RM46L830PGE.cnf (1 hit)
    Line 14148: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\RM46L840PGE.cnf (1 hit)
    Line 14148: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\RM46L850PGE.cnf (1 hit)
    Line 14148: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\RM48L952PGE.cnf (1 hit)
    Line 14144: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\RM57D843.cnf (1 hit)
    Line 21635: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\RM57L843ZWT.cnf (1 hit)
    Line 17695: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\RM57L843ZWT_FREERTOS.cnf (1 hit)
    Line 17708: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\TMS570DC4457ZWT.cnf (1 hit)
    Line 21451: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\TMS570LC4357ZWT.cnf (1 hit)
    Line 17695: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738
  C:\ti\Hercules\HALCoGen\v04.04.00\config\TMS570LC4357ZWT_FREERTOS.cnf (1 hit)
    Line 17708: VAR.DMM_BASE_PORT.DEFAULT=0xFFFFF738

I'll filed a ticket  on this - SDOCM00115694

Dear all,

it seems that the described bug (the incorrect address of dmmPORT) is still included in the HCG release - checked in the version 04.05.02.

Please may you accordingly update the Table Known Issues in Latest version in the associated wiki page.

Thanks a lot,

Best regards, Jiri

Hi Jiri,

  I see that the dmmPORT is mapped to 0xFFFF7700. Please see below HL_reg_dmm.h file. I use HalCoGen 04.05.02. 

/** @file HL_reg_dmm.h
*   @brief DMM Register Layer Header File
*   @date 02-Mar-2016
*   @version 04.05.02
*   
*   This file contains:
*   - Definitions
*   - Types
*   - Interface Prototypes
*   .
*   which are relevant for the DMM driver.
*/

/* 
* Copyright (C) 2009-2016 Texas Instruments Incorporated - www.ti.com  
* 
* 
*  Redistribution and use in source and binary forms, with or without 
*  modification, are permitted provided that the following conditions 
*  are met:
*
*    Redistributions of source code must retain the above copyright 
*    notice, this list of conditions and the following disclaimer.
*
*    Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the 
*    documentation and/or other materials provided with the   
*    distribution.
*
*    Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/


#ifndef __REG_DMM_H__
#define __REG_DMM_H__

#include "HL_sys_common.h"
#include "HL_reg_gio.h"

/* USER CODE BEGIN (0) */
/* USER CODE END */

/* Dmm Register Frame Definition */
/** @struct dmmBase
*   @brief DMM Base Register Definition
*
*   This structure is used to access the DMM module registers.
*/
/** @typedef dmmBASE_t
*   @brief DMM Register Frame Type Definition
*
*   This type is used to access the DMM Registers.
*/

typedef volatile struct dmmBase
{
    uint32  GLBCTRL;    /**< 0x0000: Global control register 0         */
    uint32  INTSET;     /**< 0x0004: DMM Interrupt Set Register        */    
    uint32  INTCLR;     /**< 0x0008: DMM Interrupt Clear Register      */
    uint32  INTLVL;     /**< 0x000C: DMM Interrupt Level Register      */    
    uint32  INTFLG;     /**< 0x0010: DMM Interrupt Flag Register       */
    uint32  OFF1;       /**< 0x0014: DMM Interrupt Offset 1 Register           */
    uint32  OFF2;       /**< 0x0018: DMM Interrupt Offset 2 Register           */
    uint32  DDMDEST;    /**< 0x001C: DMM Direct Data Mode Destination Register                */
    uint32  DDMBL;      /**< 0x0020: DMM Direct Data Mode Blocksize Register           */
    uint32  DDMPT;      /**< 0x0024: DMM Direct Data Mode Pointer Register        */
    uint32  INTPT;      /**< 0x0028: DMM Direct Data Mode Interrupt Pointer Register     */
    uint32  DEST0REG1;  /**< 0x002C: DMM Destination 0 Region 1           */
    uint32  DEST0BL1;   /**< 0x0030: DMM Destination 0 Blocksize 1                     */
    uint32  DEST0REG2;  /**< 0x0034: DMM Destination 0 Region 2                  */
    uint32  DEST0BL2;   /**< 0x0038: DMM Destination 0 Blocksize 2                 */
    uint32  DEST1REG1;  /**< 0x003C: DMM Destination 1 Region 1                  */
    uint32  DEST1BL1;   /**< 0x0040: DMM Destination 1 Blocksize 1                 */
    uint32  DEST1REG2;  /**< 0x0044: DMM Destination 1 Region 2                   */
    uint32  DEST1BL2;   /**< 0x0048: DMM Destination 1 Blocksize 2                  */
    uint32  DEST2REG1;  /**< 0x004C: DMM Destination 2 Region 1                  */
    uint32  DEST2BL1;   /**< 0x0050: DMM Destination 2 Blocksize 1                  */
    uint32  DEST2REG2;  /**< 0x0054: DMM Destination 2 Region 2  */
    uint32  DEST2BL2;   /**< 0x0058: DMM Destination 2 Blocksize 2   */
    uint32  DEST3REG1;  /**< 0x005C: DMM Destination 3 Region 1 */
    uint32  DEST3BL1;   /**< 0x0060: DMM Destination 3 Blocksize 1                       */
    uint32  DEST3REG2;  /**< 0x0064: DMM Destination 3 Region 2              */
    uint32  DEST3BL2;   /**< 0x0068: DMM Destination 3 Blocksize 2              */
    uint32  PC0;        /**< 0x006C: DMM Pin Control 0                          */
    uint32  PC1;        /**< 0x0070: DMM Pin Control 1              */     
    uint32  PC2;        /**< 0x0074: DMM Pin Control 2              */
    uint32  PC3;        /**< 0x0078: DMM Pin Control 3              */
    uint32  PC4;        /**< 0x007C: DMM Pin Control 4              */
    uint32  PC5;        /**< 0x0080: DMM Pin Control 5              */
    uint32  PC6;        /**< 0x0084: DMM Pin Control 6              */
    uint32  PC7;        /**< 0x0088: DMM Pin Control 7              */
    uint32  PC8;        /**< 0x008C: DMM Pin Control 8              */
} dmmBASE_t;


/** @def dmmREG
*   @brief DMM Register Frame Pointer
*
*   This pointer is used by the DMM driver to access the DMM module registers.
*/
#define dmmREG ((dmmBASE_t *)0xFFFFF700U)

/** @def dmmPORT
*   @brief DMM Port Register Pointer
*
*   Pointer used by the GIO driver to access I/O PORT of DMM
*   (use the GIO drivers to access the port pins).
*/
#define dmmPORT ((gioPORT_t *)0xFFFFF770U)

/* USER CODE BEGIN (1) */
/* USER CODE END */


#endif

Hi,

I checked all the device header files in HALCoGen v04.05.02. DMM base address and port address are 0xFFFFF700U and 0xFFFFF770U respectively, which is correct. But, if you use a project created in an older version oh HALCoGen (which had the bug) and regenerate using HALCoGen, the bug might still remain.This is because the dil file created along with the HALCoGen project file saves those variable values. The values like module base address an port address will not be rewritten by the HALCoGen engine.

Hence I advice you to use the latest version of HALCoGen to create the project.

Thanks and Regards,

Veena

Dear Charles,

you are right that this works properly if you create a new HalCoGen project and generate source files first time.

But I have faced the described issue on the existing project originally generated by some older HCG version. I have manually erased the original file HL_reg_dmm.h and re-generate all the files with HCG 04.05.02 - this has not helped.

I think that the reason behind is the content of the project file <file_name>.dil at the line

DRIVER.DMM.VAR.DMM_BASE_PORT.VALUE=0xFFFFF738

This line has not been updated / overwritten by the proper / corrected value when re-generating is being launched in the HCG version 04.05.02..

Thanks for your support,

Best regards, Jiri

Hi Veena,
thanks for your explanation!
Obviously we both have submitted the posts in the same time :-)
Frankly spoken, this is a bit sad situation - TI does not clearly have in their hands how to apply (roll) any patch or bugfix regarding the DIL file.
By now, the DIL file consists of the system-specific setting (register addresses,...) as well as the user-specific setting (port setting - direction, pull-up/down,...). Maybe this could be split into separated files which let you to easily overwrite (in the controlled way) the system-specific setting during the project re-generating by a newer HCG version.  This could be more reasonable from a user view - better way how to maintain / upgrade / fix the HCG project.

Thanks a lot,
Best regards, Jiri