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Interrupts don't work when application doesn't start at 0x00000000

David Sabol
Genius 4850 points


Hi,

I have a main program and a bootloader.  Originally I had the main program so that it started at address 0x00000000 and everything worked fine (running ucos ii).  I then changed the linker file so that the vectors started at 0x00020000 instead of 0x00000000, but now if I try to download and run the main app it hangs when it needs to access interrupts (I can step through some code until the scheduler needs to be run).

 

What modifications do I need to make in order for this to work?

 

Thanks,

David

 

Linker file
 (main app)
--retain="*(.intvecs)"


/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
    VECTORS (X)  : origin=0x00020000 length=0x00000020
    FLASH0  (RX) : origin=0x00020020 length=0x0011FFE0
    STACKS  (RW) : origin=0x08000000 length=0x00003500
    RAM     (RW) : origin=0x08003500 length=0x0002cb00

}



/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    .intvecs : {} > VECTORS
    .text    : {} > FLASH0
    .const   : {} > FLASH0
    .cinit   : {} > FLASH0
    .pinit   : {} > FLASH0
    FEE_TEXT_SECTION : {} > FLASH0
    FEE_CONST_SECTION : {} > FLASH0
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM
    FEE_DATA_SECTION : {} > RAM

}


sys_intvecs.asm
 (main app)

    .sect ".intvecs"
    .arm

;-------------------------------------------------------------------------------
; import reference for interrupt routines

    .ref _c_int00
    .ref OS_CPU_ARM_ExceptUndefInstrHndlr
    .ref OS_CPU_ARM_ExceptSwiHndlr
    .ref OS_CPU_ARM_ExceptPrefetchAbortHndlr
    .ref OS_CPU_ARM_ExceptDataAbortHndlr
    .ref OS_CPU_ARM_ExceptIrqHndlr
    .ref phantomInterrupt
    .def resetEntry

;-------------------------------------------------------------------------------
; interrupt vectors

resetEntry
        b   _c_int00
        b   OS_CPU_ARM_ExceptUndefInstrHndlr
        b   OS_CPU_ARM_ExceptSwiHndlr
        b   OS_CPU_ARM_ExceptPrefetchAbortHndlr
        b   OS_CPU_ARM_ExceptDataAbortHndlr
        b   phantomInterrupt
        b   OS_CPU_ARM_ExceptIrqHndlr
        ldr pc,[pc,#-0x1b0]

    
;-------------------------------------------------------------------------------
Linker file (bootloader)

--retain="*(.intvecs)"


/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
    VECTORS 	(X)  : origin=0x00000000 length=0x00000020
    FLASH_API  	(RX) : origin=0x00000020 length=0x000014E0
    FLASH0  	(RX) : origin=0x00001500 length=0x0001EB00
    STACKS  	(RW) : origin=0x08000000 length=0x00003500
    RAM     	(RW) : origin=0x08003500 length=0x0002cb00

}


/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    .intvecs : {} > VECTORS
    flashAPI :
    {
     --library= F021_API_CortexR4_BE.lib (.text)
   	} load = FLASH_API, run = RAM, LOAD_START(api_load), RUN_START(api_run), SIZE(api_size)

    .text    : {} > FLASH0 
    .const   : {} > FLASH0 
    .cinit   : {} > FLASH0 
    .pinit   : {} > FLASH0
    FEE_TEXT_SECTION : {} > FLASH0
    FEE_CONST_SECTION : {} > FLASH0
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM
    FEE_DATA_SECTION : {} > RAM

}

sys_intvecs.asm (bootloader)

    .sect ".intvecs"
    .arm

;-------------------------------------------------------------------------------
; import reference for interrupt routines

    .ref _c_int00
    .ref phantomInterrupt
    .def resetEntry

;-------------------------------------------------------------------------------
; interrupt vectors

resetEntry
        b   _c_int00
undefEntry
        b   undefEntry
svcEntry
        b   svcEntry
prefetchEntry
        b   prefetchEntry
dataEntry
        b   dataEntry
        b   phantomInterrupt
        ldr pc,[pc,#-0x1b0]
        ldr pc,[pc,#-0x1b0]

  • 0
    TI__Guru**** 197446 points
    Hi David,

    The INT vector should be at 0x0. You can modify the interrupt vectors in your bootloader to work for your application which is located at 0x20000.

    Here is the example:

    b _c_int00 ;0x00
    b #0x1FFF8 ;0x04
    b #0x1FFF8 ;0x08, Software interrupt
    b #0x1FFF8 ;0x0C, Abort (prefetch)
    b #0x1FFF8 ;0x10, Abort (data)
    reservedEntry
    b reservedEntry ;0x14
    ldr pc,[pc, #-0x1b0] ;0x18
    ldr pc,[pc, #-0x1b0] ;0x1C

    Regards,
    QJ
  • 0 in reply to QJ Wang
    Genius 4850 points

    Hi QJ

    Thanks for the fast response.

    I have updated the interrupts,  and my bootloader seems to work and seems to download the main app OK, but it won't jump to the main application.

     

        transferAddress = (uint32_t)0x00020000;
    ((void (*)(void))transferAddress)();

     Is this the right way to jump to my main app? I'm assuming that if I am debugging the bootloader I won't be able to jump to the main and keep debugging, so I'm not sure how to proceed forward to figure out why it won't go to the main app.  I also still can't debug my main application if the address is at 0x0002_0000 but the bootloader is flashed so the int vectors should branch ok.

     

    Also,  I know many of the examples have a debug linker file that starts the main app at 0x0000_0000, and the release at 0x0002_0000.  However, I don't want to overwrite the bootloader when downloading / debugging main, since we sometimes do this on real equipment, not just our test equipment.  Is it possible to download / debug code when it starts at address 0x0002_0000, or do I need to look into swapping flash and RAM so that when we download / debug the main app we don't overwrite flash?

    Thanks,

    David

  • 0 in reply to David Sabol
    Genius 4850 points
    Also, what happens if there is a bootloader but no main application and one of the interrupts occurs? Won't it branch to an area of flash that either hasn't been written (or is potentially corrupt)?