Are there any requirements on the device clock input related to the DCAN module? (CAN network timing related?)

There is a detailed discussion of the DCAN oscillator timing in the TMS570LS Series Microcontroller Technical Reference Manual (TRM).

(http://focus.ti.com/lit/ug/spnu489/spnu489.pdf)

It’s in chapter 16.11.1.4 Oscillator Tolerance Range under the section that describes bit timing. 

In summary, the DCAN module input clock/crystal tolerance(s) depend on the bit rate and network topology.  The TRM gives an example of a 125kbps, 40m network requiring a 1.58% tolerance. It would be good to plug in your own assumptions about bit timing and check against equations I and II in this section.