I have written code for sending data on uart0 of TM4C123G LaunchPad Evaluation Board.
Problem is I am getting wrong data on PC. For example if I send 'A' char then I receive 'P' on PC.
If I send 'B' then I receive '<' on PC.
Below is my code:
/* UART regsiter , UART0_BASE 0x4000C000 */
#define RB_UARTCTL_UARTEN REG32_BIT_0
#define RB_UARTFR_TXFE REG32_BIT_7
#define RB_UARTFR_RXFE REG32_BIT_4
#define RB_UARTFR_TXFF REG32_BIT_5
#define RB_UARTLCRH_BRK REG32_BIT_0
#define RB_UARTLCRH_PEN REG32_BIT_1
#define RB_UARTLCRH_STP2 REG32_BIT_3
#define RB_UARTLCRH_FEN REG32_BIT_4
#define RB_UARTLCRH_WLEN8 ((uint32_t)0x60)
#define RB_UARTCC_CS ((uint32_t)0x00)
/* SYSCTL regsiter , SYSCTL_BASE 0x400FE000UL */
/* Register 9, GPIOHBCTL, offset 0x06C */
#define RB_GPIOHBCTL_PORTA_AHB REG32_BIT_0
#define RB_GPIOHBCTL_PORTF_AHB REG32_BIT_5
/* Register 60, RCGCGPIO, offset 0x608 */
#define RB_RCGCGPIO_PORTA_CLK REG32_BIT_0
#define RB_RCGCGPIO_PORTF_CLK REG32_BIT_5
/* Register 63, PRGPIO, offset 0x618 */
#define RB_RCGCUART_UART0_CLK REG32_BIT_0
/* Register 108, PRGPIO, offset 0xA08 */
#define RB_PRGPIO_PORTA_READY REG32_BIT_0
#define RB_PRGPIO_PORTF_READY REG32_BIT_5
/* Register 111, PRUART, offset 0xA18 */
#define RB_PRUART_UART0_READY REG32_BIT_0
/* SysTick regsiter , SysTick_BASE 0xE000E000UL */
/* Register 1, STCTRL, offset 0x010 */
#define RB_STCTRL_ENABLE REG32_BIT_0
#define RB_STCTRL_INTEN REG32_BIT_1
#define RB_STCTRL_CLK_SRC REG32_BIT_2
void main(void)
{
/* clock init at 80Mhz */
clock_init();
uart_1_init();
while(1U)
{
uart1OutByte('B');
}
}
void uart_1_init(void)
{
/* enable uart 0 */
SYSCTL->RCGCUART |= RB_RCGCUART_UART0_CLK; /* enable clock */
while(! (SYSCTL->PRUART & RB_PRUART_UART0_READY)); /* while periph ready */
/* enable clock for tx pin PA1 */
SYSCTL->RCGCGPIO |= RB_RCGCGPIO_PORTA_CLK; /* enable PORTA clock */
while(! (SYSCTL->PRGPIO & RB_PRGPIO_PORTA_READY)); /* while periph ready */
SYSCTL->GPIOHBCTL |= RB_GPIOHBCTL_PORTA_AHB; /* enable access to AHB bus */
/* enable clock for rx pin PA0 */
SYSCTL->RCGCGPIO |= RB_RCGCGPIO_PORTA_CLK; /* enable PORTB clock */
while(! (SYSCTL->PRGPIO & RB_PRGPIO_PORTA_READY)); /* while periph ready */
SYSCTL->GPIOHBCTL |= RB_GPIOHBCTL_PORTA_AHB; /* enable access to AHB bus */
/* disable uart */
UART0->CTL &= (uint32_t)(~RB_UARTCTL_UARTEN);
/* wait while tx not empty */
while(!(UART0->FR & RB_UARTFR_TXFE));
/* wait while rx not empty */
while(!(UART0->FR & RB_UARTFR_RXFE))
{
(void)UART0->DR; /* dummy read the register */
}
/* flush the tx fifo */
UART0->LCRH &= (uint32_t)(~RB_UARTLCRH_FEN);
/* set 9600 baud rate */
UART0->IBRD = 520U; /* 80,000,000 / (16 * 9600) = 520.8333 */
UART0->FBRD = 53U; /* int(0.8333 * 64 + 0.5)= 53 */
/* uart line control */
UART0->LCRH |= (RB_UARTLCRH_WLEN8 | RB_UARTLCRH_FEN); /* 8 bit word length , fifo enabled */
/* one stop bit , parity disabled, break diabled */
UART0->LCRH &= (uint32_t)(~(RB_UARTLCRH_BRK | RB_UARTLCRH_PEN | RB_UARTLCRH_STP2));
/* set clock */
UART0->CC = RB_UARTCC_CS; /* set system clock as clock */
/* set PA1 as uart tx */
GPIOA_AHB->AFSEL |= REG32_BIT_1; /* alternate mode select */
GPIOA_AHB->ODR &= (u32_t)(~REG32_BIT_1); /* not open drain */
GPIOA_AHB->AMSEL &= (u32_t)(~REG32_BIT_1); /* analog function disabled */
GPIOA_AHB->PUR &= (u32_t)(~REG32_BIT_1); /* pull up disabled */
GPIOA_AHB->PDR &= (u32_t)(~REG32_BIT_1); /* pull down disabled */
GPIOA_AHB->DR2R |= REG32_BIT_1; /* 2mA drive enable */
GPIOA_AHB->SLR &= (u32_t)(~REG32_BIT_1); /* slew disabled */
GPIOA_AHB->PCTL = (GPIOA_AHB->PCTL & 0xFFFFFF0FU) | 0x00000010U; /* select uar functionality */
GPIOA_AHB->DEN |= REG32_BIT_1; /* digital function enabled */
/* set PA0 as uart rx */
GPIOA_AHB->AFSEL |= REG32_BIT_0; /* alternate mode select */
GPIOA_AHB->ODR &= (u32_t)(~REG32_BIT_0); /* not open drain */
GPIOA_AHB->AMSEL &= (u32_t)(~REG32_BIT_0); /* analog function disabled */
GPIOA_AHB->PUR &= (u32_t)(~REG32_BIT_0); /* pull up disabled */
GPIOA_AHB->PDR &= (u32_t)(~REG32_BIT_0); /* pull down disabled */
GPIOA_AHB->DR2R |= REG32_BIT_0; /* 2mA drive enable */
GPIOA_AHB->SLR &= (u32_t)(~REG32_BIT_0); /* slew disabled */
GPIOA_AHB->PCTL = (GPIOA_AHB->PCTL & 0xFFFFFFF0U) | 0x00000001U; /* select uart functionality */
GPIOA_AHB->DEN |= REG32_BIT_0; /* digital function enabled */
/* enable uart */
UART0->CTL |= RB_UARTCTL_UARTEN; /* enable uart */
} /* function ends here */
uint8_t uart1InByte(uint8_t *error)
{
uint16_t temp;
while( UART0->FR & RB_UARTFR_RXFE );
temp = (uint16_t)( UART0->DR & 0xFFFU ); /* only 12 bits are required */
*error = (uint8_t)( (temp >> 8U) & 0x0FU );
return ( (uint8_t)(temp & 0xFFU) );
} /* function ends here */
void uart1OutByte(uint8_t temp)
{
while( UART0->FR & RB_UARTFR_TXFF );
UART0->DR = (uint32_t)temp;
} /* function ends here */
