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Question regarding bit banding in blinky exmaple

Other Parts Discussed in Thread: TM4C129XNCZAD, TM4C123GH6PM

Hello,

While I tried to understand blinky example of TM4C1220X, I got a question I could not understand.

I would appreciate it if anyone can help me understand. 

in tm4c129xnczad.h file

#define SYSCTL_RCGCGPIO_R       (*((volatile uint32_t *)0x400FE608))

#define SYSCTL_RCGCGPIO_R14     0x00004000

in blinky.c file

int main(void)

{

     volatile uint32_t ui32Loop;    

    //
    // Enable the GPIO port that is used for the on-board LED.
    //
    SYSCTL_RCGCGPIO_R = SYSCTL_RCGCGPIO_R14 | SYSCTL_RCGCGPIO_R13 ;

    //
    // Do a dummy read to insert a few cycles after enabling the peripheral.
    //
    ui32Loop = SYSCTL_RCGCGPIO_R;

    //
    // Enable the GPIO pin for the LED (PQ7). Set the direction as output, and
    // enable the GPIO pin for digital function.
    //
    GPIO_PORTQ_DIR_R = 0x80;
   GPIO_PORTQ_DEN_R = 0x80;

   

......

.....

}

1.  #define SYSCTL_RCGCGPIO_R       (*((volatile uint32_t *)0x400FE608)) 

What I am understanding is  this macro points to memory address 0x400FE608 which is part of peripheral bit-band region.

A value at 0x400FE608 is a single bit in the perpheral bit-band region. So the value must be 0 or 1. 

The problem is SYSCTL_RCGCGPIO_R = SYSCTL_RCGCGPIO_R14 

this code assigns SYSCTL_RCGCGPIO_R1 which is 0x00004000 to word in the alias region to update a single bit in the bit-band region.

I can't understand why.

2. SYSCTL_RCGCGPIO_R

Isn't this register a System Control Register? What I have known is all the system control registers are located between  0xE0000000 and 0xE00FFFFF.

are there also system control registers in SRAM and Peripheral memory regions?

Thanks for reading 

Jay

  • Hello Jay,

    First of all the DRM method is something we do not recommend but is in the SW for users planning to do optimized code. Having said that the register is indeed a System Control register for the device and not to be confused with that of the CPU. This register is responsible for device level settings. The register is not in the bit banded region and requires the use of standard C operators for access.

    Regards
    Amit
  • Hello Amit,

    Thanks for your kind explain. 

    I do not know what DRM method is. Can you explain what it is and why it is not recommended please?

    And also, the address of SYSCTL_RCGCGPIO_R seems to be 0x400FE608. According to my understand, it is within bit-band alias region.

    Why isn't it in the bit banded region?

    I would really appreciate it if you can help me understand.

    Jay

  • Hi jinyoung,

    I think Amit is refering when he said DRM, Direct Register programming though I don't know what the M stands for.

    The problem with using that method is that unlike using C libraries it takes much more time to develop code and it's more easy to make big mistakes with the Direct Register since the C method tends to give a heads up when you build it.

    The system control base address is :0x400F.E000
    The offset for the RCGCGPIO is 0x608
    So your working with that. That's why it's  0x400FE608.
    The 32bit register for the TM4C123GH6PM part can be seen bellow (didn't find any TM4C1220X, are you sure you posted correctly?):

    The TM4C123GH6PM has until GPIOF, that's why there's 5 usable bits (A, B, C, D, E ,F). Other parts with more GPIO would have more usable bits.
    So this is the whole register, you can control all the GPIOs clocks (run or disable) at the same time. The macro SYSCTL_RCGCGPIO_R refers to the hole register. See why it isn't just for 1 bit (bit banded region)? It's general to a whole register. Hence why you need usually to use |= to set a single bit only or &=~ to clear a single bit.

    I know in Tivaware there are macros to help accessing a single bit but you can do that anyway with some operations. I do believe all registers macros refer to the the whole register (the bit-band alias region) though I never use direct register method with direct register programming like that in the Tiva.


    I hope I helped clarify your doubt,

  • Hello Jay,

    SYSCTL_RCGCGPIO_R is a DRM (Direct Register Macro). In this the register name is the address for read and write access. It is not within the bit banded address space as it would require a large address space for all such registers greatly increasing the address decoding logic. Since these registers are sparingly used, it makes more sense to keep the address fixed with individual bits to be changed as required by the application

    Regards
    Amit
  • Hello Luis,

    Thank you so much for your help.

    You reply helped me understand this stuff greatly.
  • Hello Amit,

    Thanks for you reply. I could learn lots of stuff thanks to your help.
    But let me ask something about memory region. I understand what SYSCTL_RCGCGPIO_R is now. System Control Base Address is 0x400FE000 and its offset is 0x608. So the macro points 0x400FE608 which is between 0x40000000 and 0x4000FFFF.
    What I have known is that data accesses to the bit-band alias region(0x42000000 ~ 0x43FFFFFF) are automatically remapped to bit band region(0x40000000 ~ 0x400FFFFF). So I guess writing access to part of alias region which is corresponding to 0x400FE608 may occur problems as data accesses to there region are automatically converted into bit-band operations.
    So then I wonder why documents does not explain range from 0x40000000 to 0x400FE604 is bit-band region(excluding system control register). Because 0x400FE608 is not supposed to be within bit-band region.

    Thanks for reading my question.

    Sincerely,

    Jay
  • Hi Jay,

    Check out 2.4.5 Bit-Banding on the device datasheet.


    I kinda always confuse the bit band vs bit band alias. So if I am not remembering in reverse, most peripheral registers work in the bit band region - 1 access to the address means an access to the whole 32bit word, you are editing/reading the whole 32bit word. Ok?
    Again, I don't know what device you are using but in the TM4C123GH6PM the 0x400FE604 is in the bit band region! So I don't quite get you question.

    If you were writing to the alias region corresponding to 0x400FE604 bit band region, you would only be editing 1 bit.
    Taken from ARM infocenter:
    "Writing to a word in the alias region updates a single bit in the bit-band region."

    and

    "Bit band accesses can use byte, halfword, or word transfers. The bit band transfer size matches the transfer size of the instruction making the bit band access."

    Most (if not all) have their registers in the bit band region so you can access the whole register for the most part.
  • Hi Luis,

     

    Thanks for your help.

    I am currently working on TM4C129X and it seems to have same range of bit-band region which is from 0x40000000 to 0x400FFFFF.

    And its alias bit-band range is from 0x42000000  to 0x43FFFFFF. As you know SYSCTL_RCGCGPIO_R(0x400FE608) is within bit-band region.

    Access to bit-band alias region is supposed to automatically remapped to  bit band region(0x40000000 ~ 0x400FFFFF).

    So if SYSCTL_RCGCGPIO_R is not supposed to be in bit-band region. Its address should be after 0x400FFFFFFF not 0x400FE608.

    Or bit-band region should be defined within the range of 0x40000000 ~ 400FE608.

    Otherwise, access to the bit-band alias region which corresponds to 0x400FE608 will be available. But Amit said SYSCTL_RCGCGPIO_R is not in bit-band

    region. This is what I cannot understand now.

    I am sorry that my english is so bad that you may have a difficulty in understanding my question.

    Anyway, thank you so much for your interest.

     

  • Well what I can tell for sure: You access the whole word.

    Second if you check table 2.7 you can confirm the regions.

    What Amit referred might be that there isnt 1 address for each bit which is what the bit band alias does, just look, 32Mb!
    Instead you always reffer to the whole 32bit word and access the entire register instead of a single bit on it. Being that true you need to take of using operations like OR and AND to set and clear individual bits without affecting the whole register