How to build TivaWare bootloader

I've adapted that CCS project for the TM4C1294NCDPT but it won't build-- it appears to have issues with the linker memory settings. I get the following errors:

"C:/ti/TivaWare_C_Series-2.1.0.12573/boot_loader/bl_link_ccs.cmd"  -l"libc.a" 
<Linking>
"C:/ti/TivaWare_C_Series-2.1.0.12573/boot_loader/bl_link_ccs.cmd", line 41: error #10263: FLASH memory range has already been specified
"C:/ti/TivaWare_C_Series-2.1.0.12573/boot_loader/bl_link_ccs.cmd", line 41: error #10264: FLASH memory range overlaps existing memory range FLASH
"C:/ti/TivaWare_C_Series-2.1.0.12573/boot_loader/bl_link_ccs.cmd", line 42: error #10263: SRAM memory range has already been specified
"C:/ti/TivaWare_C_Series-2.1.0.12573/boot_loader/bl_link_ccs.cmd", line 42: error #10264: SRAM memory range overlaps existing memory range SRAM

>> Compilation failure
"C:/ti/TivaWare_C_Series-2.1.0.12573/boot_loader/bl_link_ccs.cmd", line 61: warning #10190-D: absolute symbol "__STACK_TOP" being redefined
"C:/ti/TivaWare_C_Series-2.1.0.12573/boot_loader/bl_link_ccs.cmd", line 61: warning #10190-D: absolute symbol "__STACK_TOP" being redefined
error #10056: symbol "ResetISR" redefined: first defined in "./tm4c1294ncpdt_startup_ccs.obj"; redefined in "./boot_loader/bl_startup_ccs.obj"
"C:/ti/TivaWare_C_Series-2.1.0.12573/boot_loader/bl_link_ccs.cmd", line 61: warning #10190-D: absolute symbol "__STACK_TOP" being redefined
error #10010: errors encountered during linking; "boot_emac_flash.out" not built
gmake: *** [boot_emac_flash.out] Error 1
gmake: Target `all' not remade because of errors.

Amit, 

I've attached the CCS project for you. boot_emac_flash.zip

Hi Amit, 

Thanks for the info. I found the code you pointed me to and copied it into my firmware. When I initiate the firmware update, the device stops all other activity except for the ethernet activity LEDs, so I assume it's in the bootloader correctly. However the LM Flash Tool set for the IP address and MAC address of the target device hangs on "attempting to connect" and seems to never proceed past that point. And UniFlash 3.1 configured for "Stellaris Ethernet" with the same information filled in seems to crash when I attempt to program firmware with it. 

I can actually confirm the device is still functioning in the bootloader, as Wireshark shows it sending ARP broadcasts from the same IP address it had previously. 

Perhaps it's a blocked port/protocol in my firewall? Which ports do the Ethernet update utility use?

I have the MAC address and IP address set in LM Flash Tool, like so: 

After I press Program in the Program tab, it hangs on "Attempting to connect", like so:

-Rudy

Perhaps he forgot to REM the Snow Flake clock fix top of (bl_emac.c)? That patch kills the EMAC clock.

//
// Define ROM_SysCtlClockFreqSet() for snowflake RA0. Even though this function
// is deprecated in RA0 ROM, the function operates correctly when 
// SYSCTL_MOSCCTL register is configured correctly prior to calling this
// function.
//
//#if defined(TARGET_IS_TM4C129_RA0)
//#define ROM_SysCtlClockFreqSet                                                \
        ((uint32_t (*)(uint32_t ui32Config,                                   \
                       uint32_t ui32SysClock))ROM_SYSCTLTABLE[48])
//#endif

I commented out that define and I got an undefined symbol error in linking. I presume I need to replace it with something? Problem is I'd have to hunt through all the files to see where it's used. 

I did clean the project, the error still occurs. The error is as follows: 

<Linking>

 undefined          first referenced         
  symbol                in file              
 ---------          ----------------         
 SysCtlClockFreqSet ./boot_loader/bl_emac.obj

The second line on our chips is "4NCPDTT3", where the T I think indicates that it's a high-temperature version of the chip. That's the only version Mouser had in stock. 

TI3 suffix is version 3 Si-metal - latest & greatest. Not sure why compiler it is posting error after U first (clean) the project prior to recompile?

Assuming the MPU clock is also configured in the main function of the application that invokes Boot Loader?

Check the project CCS build dependencies tab has (driverlib-Tiva-12573) active, if not add it then check under Project Reference in tree will then show library.

Forgot to mention the crystal frequency must be set in (bl_config.h) order code in (bl_main.c) shown below is invoked.

#ifdef CRYSTAL_FREQ
    //
    // Since the crystal frequency was specified, enable the main oscillator
    // and clock the processor from it.
    //
    HWREG(SYSCTL_RCC) &= ~(SYSCTL_RCC_MOSCDIS);
    Delay(524288);
    HWREG(SYSCTL_RCC) = ((HWREG(SYSCTL_RCC) & ~(SYSCTL_RCC_OSCSRC_M)) |
                         SYSCTL_RCC_OSCSRC_MAIN);
#endif

In the main function of the firmware I manually set the system clock to 120 MHz with

ROM_SysCtlClockFreqSet(SYSCTL_USE_OSC | SYSCTL_CFG_VCO_320, 120000000);

In bl_emac.h I have CRYSTAL_FREQ set to 25000000 (25MHz). The board also has a 25MHz crystal oscillator. 

I've added a dependency for driverlib and the bootloader still doesn't build with that define commented out. 

I meant to say that I set CRYSTAL_FREQ in bl_config.h. 

My main firmware uses driverlib for other things, so it already had sysctl.h included. 

On a plus side, I found where the undefined symbol was: lower down in bl_emac.c, there was a call to MAP_SysCtlClockFreqSet, which was a macro alias for SysCtlClockFreqSet, which led me to believe that driverlib still wasn't being included. So I manually added a link option for driverlib.lib and now the bootloader compiles with the RA0 code removed. 

However, it still doesn't work. 

I saw another question about the TM4C1294 bootloader for ethernet not working, and the solution there had to do with ".vtable" being linked into flash rather than RAM for the main firmware. My main firmware is compiled with GCC using the Energia linker file, which I have attached. I can see a "vtable" section in .data, which is sure enough, loaded into REGION_RAM. I'll try putting my whole .data into flash and see what happens. 

/**
 *
 * lm4fcpp.ld - Linker configuration file for Energia c++ programs.
 *
 */ 

MEMORY 
{
    flash (rx) : ORIGIN = 0x00004000, LENGTH = 0x00100000 
    ram  (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000 
}

/* STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x800 ; */

REGION_ALIAS("REGION_TEXT", flash);
REGION_ALIAS("REGION_RAM", ram);

SECTIONS 
{
    .text :
    {
        . = ALIGN(4);
        _text = .;
        KEEP(*(.isr_vector))
        *(.text .text* .gnu.linkonce.t.*)
        *(.glue_7t) *(.glue_7)
        *(.rodata .rodata* .gnu.linkonce.r.*)
        *(.ARM.extab* .gnu.linkonce.armextab.*)
        

        . = ALIGN(4);
        KEEP(*(.init))
        . = ALIGN(4);
        __preinit_array_start = .;
        KEEP (*(SORT(.preinit_array*)))
        KEEP (*(.preinit_array))
        __preinit_array_end = .;

        . = ALIGN(4);
        __init_array_start = .;
        KEEP (*(SORT(.init_array.*)))
        KEEP (*(.init_array))
        __init_array_end = .;

        . = ALIGN(4);
        KEEP(*(.fini))

        . = ALIGN(4);
        __fini_array_start = .;
        KEEP (*(.fini_array))
        KEEP (*(SORT(.fini_array.*)))
        __fini_array_end = .;

        . = ALIGN(4);
        _etext = .;
    } > REGION_TEXT

    .data : AT(ADDR(.text) + SIZEOF(.text))
    {
        . = ALIGN(4);
        _data = .;
        *(vtable)
        *(.data .data* .gnu.linkonce.d.*)
        _edata = .;
    } > REGION_RAM

    .bss (NOLOAD):
    {
        . = ALIGN(4);
        _bss = .; 
        *(.bss .bss*) 
        *(COMMON)
        . = ALIGN(4); 
        _ebss = .; 
        . = ALIGN(8);
    } > REGION_RAM 

/*
    .stack (NOLOAD):
    {
        . = ALIGN(8);
        _stack = .;
        . = . + STACK_SIZE;
        . = ALIGN(8);
        _estack = .;
    } > REGION_RAM
*/

    PROVIDE_HIDDEN (__exidx_start = .);
    .ARM.exidx :
    {
      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
    } > REGION_RAM
    PROVIDE_HIDDEN (__exidx_end = .);

    . = ALIGN(4);
    _end = . ;
}

/* end of allocated ram is start of heap, heap grows up towards stack*/
PROVIDE(end = _end);

/* top of stack starts at end of ram, stack grows down towards heap */
PROVIDE (_estack = ORIGIN(ram) + LENGTH(ram));

My main app was always working and invoking the bootloader. It turns out the LM Flash error was from a conflict with VirtualBox and not dependent on the firmware app. 

Upon further investigation I don't think the bootloader is working at all. Wireshark shows no UDP packets whatsoever leaving it, no BOOTP requests, nothing. Also, LM Flash never sends any UDP packets to it, either. 

You might try connect direct MPU Ethernet via TFTP client in Windows - if client stays connected for some time without immediate dropping offline then BL TFTP is up.
 I like to see link and strobe LED flash showing we have life.  Might add code (bl_emac.c) in target area to BL for such events.

    //
    // Initialize the MAC and set the DMA mode.
    //
   // ROM_
    EMACInit(EMAC0_BASE, ui32Clock,
             EMAC_BCONFIG_MIXED_BURST | EMAC_BCONFIG_PRIORITY_FIXED, 4, 4, 0);

    //
    // Using the EMACMIIADDR MII register, access and configure PHY MR37 (EPHYLEDCFG)
    // and reconfigure TX/RX activity for LED2, Flash 20Hz (50ms) datasheet pages 1486, 1638, 1647
    //
   MAP_EMACPHYExtendedWrite(EMAC0_BASE, EMAC_PLA_PHY, EPHY_LEDCFG, EMAC_PHY_PF0LED0LNK_PF1LED2ACTY);

   MAP_EMACPHYExtendedWrite(EMAC0_BASE, EMAC_PLA_PHY, EPHY_LEDCR, EPHY_LEDCR_BLINKRATE_20HZ);

    //
    // Get the MAC address from the flash user registers.  If it has not been
    // programmed, then use the boot loader default MAC address.
    //
    ROM_FlashUserGet(&ui32User0, &ui32User1);
    if((ui32User0 == 0xffffffff) || (ui32User1 == 0xffffffff))
    {

(emac.h) add defines below:

#define EMAC_PHY_PF0LED0LNK_PF4LED1ACTY     0x00000510
#define EMAC_PHY_PF0LED0LNK_PF1LED2ACTY     0x00000150
#define EMAC_PHY_PK4LED0LNK_PK5LED2ACTY     0x00000150

I tried adding that code to the bootloader, but "EMAC_PLA_PHY" was undefined, and I didn't know which header had it. 

Anyway, when I branch into the bootloader from my main app, I see the ethernet LEDs get "disrupted" (turn off) for under a second before resuming blinking the orange LED. After that, only the orange LED continues blinking at its own pace regardless of activity. Now the interesting thing is this: as part of my troubleshooting other things yesterday, I accidentally triggered the branch to bootloader code in my main app when the bootloader wasn't on the board-- and it behaved the same way. Same LED disruption, no activity LED, and of course no ethernet response. 

Also, when I did have the bootloader on the board, after I branched into it the Windows tftp client couldn't connect to the board. 

My specific code to branch to the bootloader from my main app is a copy-paste from the example firmware: 

//
// Return control to the boot loader.  This is a call to the SVC
// handler in the flash based boot loader.
//
(*((void(*)(void))(*(unsigned long *)0x2c)))();

Perhaps that address isn't valid and I'm jumping to the wrong spot in memory?

That is the correct branch address to invoke BL. Now the orange LED flash and missing define are each interesting.

Dealing with a custom board here? The ETH external Rbias pin 59 resistor is 4.87k on TM4c1294NCPDT?

That define EMAC_PLA_PHY and many other EMAC defines are listed in (bl_emac.h) must be an #include at top of (bl_emac.c).

Well BL TFTP  was working very well up until revision 3 silicon, only witnessed it load the *.bin one time. Now BL  invokes, link LED on and activity LED flashes but the TFTP transfer is halted.  There is no IP address assignment for BootP and they set the broadcast address 255.255.255.255 in the code below. Make sure to delay a second after master disable all interrupts  prior to entering into BL or it will hang up. Wonder what is up here might be the ARP timer timeout?

ROM_SysCtlDelay(g_ui32SysClock / 5);

                        //
                        // Also disable the SysTick interrupt.
                        //
                        SysTickIntDisable();

                        //
                        // Disable all processor interrupts.  Instead of disabling them
                        // one at a time (and possibly missing an interrupt if new sources
                        // are added), a direct write to NVIC is done to disable all
                        // peripheral interrupts.
                        //
                        HWREG(NVIC_DIS0) = 0xffffffff;
                        HWREG(NVIC_DIS1) = 0xffffffff;

                        //
                        // Clear any active interrupts.  If the boot loader uses
                        // any interrupts, they will therefore respond as expected.
                        //
                        HWREG(NVIC_APINT) = (NVIC_APINT_VECTKEY |
                                             NVIC_APINT_VECT_CLR_ACT);

                        //
                        // Return control to the boot loader.  This is a call to the SVC
                        // handler in the boot loader.
                        //
                        (*((void (*)(void))(*(uint32_t *)0x2c)))();

//! This function starts the Ethernet firmware update process.  The BOOTP
//! (as defined by RFC951 at tools.ietf.org/.../rfc951) and TFTP (as
//! defined by RFC1350 at tools.ietf.org/.../rfc1350) protocols are
//! used to transfer the firmware image over Ethernet.

    // Create a UDP socket for sending requests to the BOOTP server.  After the
    // BOOTP portion of the protocol has been handled, this socket will be
    // reused to communicate with the TFTP server.
    //
    *((uint32_t *)(void *)(&sAddr)) = 0xffffffff;
    g_pConn = uip_udp_new(&sAddr, HTONS(BOOTP_SERVER_PORT));
    uip_udp_bind(g_pConn, HTONS(BOOTP_CLIENT_PORT));

Well it's good to know that it's not just me having this issue. Unfortunately, I have a two week deadline to have devices shipping and I have other firmware issues to attend to. It would be nice if a TI engineer could investigate. 

Did after awhile waiting (ARP timer fires every 60 seconds) start to get UDP response 255.255.255.255 (67) -->(68) but from the Wii console. Other times from machines on the network. 

Reviewing the boot loader code in some detail discovered in more detail;

1. Appears to only Invoke ConfigureEnet() prior to the app loading into SRAM and skips over it in other modes/times.

2. Asserts only EnetReconfig() when BL is invoked from app using interrupt handler 0xc2 (startup_ccs.c). Below posted code initializes the MPU 1st step prior to invoking UpdateBootP() that first calls EnetReconfig(). I commented the user added stuff.

3. Find it odd when enet_enable_update (EEU) is enabled (bl_config.h) the interrupt handler routine ignores bl_main.c - Updater() asserts only when EEU is not enabled. States Updater is for UART,SSI,USB update mode..

4. All TFTP console commands are handled by Updater(). The BootP file transfer RFC (via UIP) appears to not use the Updater() commands since EEU is enabled -- (#ifdef top of (bl_main) excludes EEU from Updater()) or possibly code was somehow jumping into Updater to listen for client commands. Believe later is unlikely since my GUI uses the TFTP client to access upload *.bin file - soon after clicking ok the progress indicator bar starts moving when EEU is enabled. The code in bl_main.c complies with complex UIP protocol that appears to not be listening for ARP replies yet is sending UIP out since Wii console responded. Never dove this deep into TFTP before nor ever wanted to. 

    .thumbfunc UpdateHandler
UpdateHandler: .asmfunc
    ;;
    ;; Initialize the processor.
    ;;
    bl      ProcessorInit

    ;;
    ;; Load the stack pointer from the vector table.
    ;;
    movs    r0, #0x0000
    ldr     sp, [r0]

    ;;
    ;; Call the user-supplied low level hardware initialization function
    ;; if provided.
    ;;
 ;;.if $$defined(BL_HW_INIT_FN_HOOK)
   ;; bl      BL_HW_INIT_FN_HOOK
 ;;.endif

    ;;
    ;; Call the user-supplied re-initialization function if provided.
    ;;
 ;;.if $$defined(BL_REINIT_FN_HOOK)
   ;; .ref    BL_REINIT_FN_HOOK
   ;; bl      BL_REINIT_FN_HOOK
 ;;.endif

    ;;
    ;; Branch to the update handler.
    ;;
 .if $$defined(ENET_ENABLE_UPDATE)
    b       UpdateBOOTP
 .elseif $$defined(CAN_ENABLE_UPDATE)
    .ref    AppUpdaterCAN
    b       AppUpdaterCAN
 .elseif $$defined(USB_ENABLE_UPDATE)
    .ref    AppUpdaterUSB
    b       AppUpdaterUSB
 .else
    b       Updater
 .endif
    .endasmfunc

LWIP (uip.c) is providing all the BootP functions, (uip.h) TCP/UIP configuration.  Back tracked several months restored folder when BL was know working. Possibly something has changed  either on my network or PC yet firewall is open on UDP 67-68 both inbound/outboud. BL loads then activity LED stays on solid no blink. Finally did get the UART code to load print debug messages in the UIP loop.  UART prints a few messages in the receive loop then quits and messages are problematic in the high speed loop.

PacketReceive() checks  DES0_RX_CTRL_OWN flag to determine does the DMA hardware or Host have control of RXD data using descriptor bIt 31 to receive packets filtering up to application layer in SRAM.  The only way I could get instruction pointer to move past the first RXD descriptor test (MAinAppLoop) was to remove the (!) from the OWN bit test. Made it go a few rounds after changing all 3 OWN tests to DES0_RX_STAT_TS_AVAILABLE and thought that was it. In any case it proved the OWN flag is not being set by EMAC, believe DES0_RX_TS_ = Time Stamp available.

U can add UART code to the top of UpdateBOOTP() and print your added messages to a Terminal emulator (YAT or Putty) on virtual COM3 or 4 via USB pipe loaded from TM4C1294 device driver.  Be mindful where place print messages, some loops run extremely fast, UARTprintf  often can Halt MPU if buffer gets plugged up as no RTS/CTS hand shake in the COM pipe. Hope this helps!

#ifdef UART_PRINT_ENABLE
    //
    // Enable pin PA0 PA1 for UART0 U0RX, U0TX
    //
    ROM_GPIOPinConfigure(GPIO_PA0_U0RX);
    ROM_GPIOPinConfigure(GPIO_PA1_U0TX);
    ROM_GPIOPinTypeUART(GPIO_PORTA_AHB_BASE, GPIO_PIN_0 | GPIO_PIN_1);

    //
    // Enable the UART, clear the terminal for printing messages.
    // Set data rate, length, parity, and number of stop bits to 8-N-1.
    //
    UARTStdioConfig(0, UART_FIXED_BAUDRATE, 120000000);

    UARTprintf("<< UART print configured Enabled >>\n");

#endif

BTW: (bl_config.h) add:

//*****************************************************************************
//
// Selects the UART to print status messages on command progress.
// Possibly bad to have enabled with UART_ENABLE_UPDATE.
// UART_FIXED_BAUDRATE determines the data rate.
//
//*****************************************************************************
#define UART_PRINT_ENABLE

//*****************************************************************************
//
// Selects the baud rate to be used for the UART.
//
// Depends on: UART_ENABLE_UPDATE, CRYSTAL_FREQ
// Exclusive of: UART_AUTOBAUD
// Requires: None
//
//*****************************************************************************
#define UART_FIXED_BAUDRATE    460800 // 115200