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TM4c123gh6pm Didital Comparator interrupt problem

Hi Everybody

I`m writing code for TM4C123GH6PM  microcontroller

I`m using ADC0 sequence 2 to send values from channel 2 to digital comparator and sequence 3 to workout values from channel 1.
My problem is that somehow sequqnce 3 triggers digital comparator interrupt.

Part of code:

/*=================================================================================================*/
void ADC0_init(void)
{
/*-------------------------------------------------------------------------------------------------*/

	SYSCTL_RCGC0_R |= SYSCTL_RCGC0_ADC0 | SYSCTL_RCGC0_ADC0SPD_1M;
	SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOE;
/*-------------------------------------------------------------------------------------------------*/
GPIO_PORTE_DIR_R &=~(ADC0_CH1 | ADC0_CH2); // GPIO_PORTE_AFSEL_R |= ADC0_CH1 | ADC0_CH2 ; // GPIO_PORTE_DEN_R &=~(ADC0_CH1 | ADC0_CH2); // GPIO_PORTE_AMSEL_R |= ADC0_CH1 | ADC0_CH2; // /*-------------------------------------------------------------------------------------------------*/ ADC0_PC_R &=~ADC_PC_SR_M; // clear max sample rate field ADC0_PC_R |= ADC_PC_SR_1M; // configure for 1M samples/sec /*-------------------------------------------------------------------------------------------------*/ ADC0_SSPRI_R = 0x1320; // sequencer 3 is 2nd-highest priority, sequencer 2 is lowest priority /*-------------------------------------------------------------------------------------------------*/ ADC0_ACTSS_R &=~(ADC_ACTSS_ASEN2 | ADC_ACTSS_ASEN3); // disable sample sequencer 2 & 3 /*-------------------------------------------------------------------------------------------------*/ ADC0_EMUX_R |= ADC_EMUX_EM2_ALWAYS | ADC_EMUX_EM3_TIMER; // SS2 is always trig; SS3 is timer trig /*Sequence_2---------------------------------------------------------------------------------------*/ ADC0_SSOP2_R |= ADC_SSOP2_S0DCOP; // 1st sample of SS2 is sent to the ADC0_SSDC2_R &=~ADC_SSDC2_S0DCSEL_M; // digital comparator unit 0 ADC0_SSMUX2_R |= 2 << ADC_SSMUX2_MUX0_S; // set 2nd channel for 1st sample of SS2 ADC0_SSCTL2_R |= ADC_SSCTL2_END1; // end of SS2 on 1st sample /*DCU_0--------------------------------------------------------------------------------------------*/ ADC0_DCCTL0_R |= ADC_DCCTL0_CIC_HIGH | ADC_DCCTL0_CIM_HONCE; // Hysteresis Once mode in High Band DCU0_setHighLevel(495); // set Comp1 level /*Sequence_3---------------------------------------------------------------------------------------*/ ADC0_SSMUX3_R = 1 << ADC_SSMUX3_MUX0_S; // set 1st channel for 1st sample of SS3 ADC0_SSCTL3_R |= ADC_SSCTL3_IE0 + ADC_SSCTL3_END0; // interrupt and end of SS3 on first sample /*-------------------------------------------------------------------------------------------------*/ ADC0_IM_R |= ADC_IM_DCONSS2 | ADC_IM_MASK3; // enable SS3 int and DComp int at SS2 /*-------------------------------------------------------------------------------------------------*/ ADC0_ACTSS_R |= ADC_ACTSS_ASEN2 | ADC_ACTSS_ASEN3; // enable sample sequencer 2 & 3 /*NVIC---------------------------------------------------------------------------------------------*/ NVIC_PEND0_R |= (1 << 17) + (1 << 16); // confgure NVIC for ADC seq2(int#16) and seq3(int#17) NVIC_EN0_R |= (1 << 17) + (1 << 16); // /*-------------------------------------------------------------------------------------------------*/ } /*=================================================================================================*/ /*================================================================================================*/ void DCU0_setHighLevel(word pi_level) { ADC0_DCCMP0_R = (pi_level << 16) & 0xFFF0000; // } /*=================================================================================================*/ void DCU0_toggleStatus(void) { ADC0_DCCTL0_R ^= ADC_DCCTL0_CIE; } /*=================================================================================================*/ void DCU0_reset(void) { ADC0_DCRIC_R |= ADC_DCRIC_DCINT0; } /*=================================================================================================*/ /*=================================================================================================*/ void ADC0s3_IntHandler(void) { if (ADC0_RIS_R & ADC_RIS_INR3) { ADC0_ISC_R |= ADC_ISC_IN3; SS3_handler(ADC0_SSFIFO3_R); } } /*=================================================================================================*/ void ADC0s2_IntHandler(void) { if (ADC0_RIS_R & ADC_RIS_INRDC) { ADC0_DCISC_R |= ADC_DCISC_DCINT0; DComp_handler(); } } /*=================================================================================================*/

Any qualified advise or help will be appreciated.