Using clock phase 1 or inverted SCLK with advanced SSI mode

Nicolas Göddel

Hi there,

I am using a Tiva C Series Connected Launchpad TM4C1294XL. At the moment I send 24 bits of data over SSI2 and manually set FSS/CS low before and high after transmission. Now I thought about using the advanced SSI mechanism wich does FFS automatically if I enable frame hold and use SSIDataPutFrameEnd for the third byte. In theory this would work great, but I need a clock phase of 1 (SSI_FRF_MOTO_MODE_1) which is not supported by advanced SSI.

Is there a possibility to simulate the clock phase or invert the clock polarity? I have connected a AD5754 to my Launchpad and this chip supports SSI_FRF_MOTO_MODE_1 and SSI_FRF_MOTO_MODE_2, because it ignores SCLK when FSS is low.

Thank you!

over 10 years ago

0 Amit Ashara over 10 years ago

TI__Guru**** 244400 points

Hello Nicolas

Unfortunately Advanced mode is supported in MOTO MODE-0 and with DSS=8 only.

Regards
Amit

0 Nicolas Göddel over 10 years ago in reply to Amit Ashara

Intellectual 795 points

Hello Amat

That is what I am talking about. I know about this restriction. But can I emulate a inverted SCLK pin somehow? For example on ATXMega Devices from Atmel you are able to invert the output each GPIO pin, regardless the pin was used directly or by some other periphery like SPI, UART, PWM etc. At the moment the only solution would be to connect an inverting circuit (NAND, NOR) to the SCLK output of the ARM.

0 Amit Ashara over 10 years ago in reply to Nicolas Göddel

TI__Guru**** 244400 points

Hello Nicolas

Not for TM4C devices. The only peripheral that supports clock inversion is EPI which would not be suitable for SPI kind of operations.

Regards
Amit

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Using clock phase 1 or inverted SCLK with advanced SSI mode