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MPU of TMS570

Hi,  
In order to divide RAM into three region, I need to use MPU.
For these three regions, the first region which called safety region save some data which are very important information.
The second region which called isolation region save nothing information, it just use to avoid other region overflow.
The third region which called no safety region save some data which are not important information.
And then I want to ensure that important information can enter safety region accurately
and unimportant information cannot write in safety region.
  So,how to certify this demand can be executed by TMS570?
I only know that I can set isolation region become read only region.
But how can I prevent unimportant informations write in safety region?
  And the size of RAM is only 256KB.If I want to divide it,
I have to split into eight equal sized non-overlapping subregions.
And these eight subregions own the same permission.
Can I split RAM into several regions which are not subregions?
Maybe I can set different permission to them in this way.

regards,
Cyrus
  • Hi Cyrus,

    The MPU doesn't know what information you are writing to RAM - so it can't tell the difference between important and not-important.

    What you can do is to change the MPU settings during task switches, so that the 'important task' can be the only one allowed to write to 'important data' area.    FreeRTOS actually has this capability if you want to experiment with it.  

    You do have more capabilility than just 8 subregions for RAM because you can overlap MPU regions.   When you do this the region with the larger # has the higher priority.     So the MPU regions get searched from 12 or 16 down to 0 and the first match is applied.

    If you want fine granularity on a small portion of the RAM,  create a higher # MPU region that has a small size,   maybe 32K.

    Then you can use a lower # region with the full size of the RAM to handle the rest of your access rights.

    For example you could have :

    Region 4 will apply to anything in the first 24K-bytes of RAM - even though this memory is also part of region 3, region 4 will have priority.

    You can see that 24K is less than 1/8th of the SRAM size, because for region 4 we only selected it to control a 32-K byte block, and then we

    disabled the last two subregions to knock the size down to 24K.