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Changing ADC sample rate in RCGC0 results in ADC clock disabled

Luis Afonso
Guru 20670 points
Other Parts Discussed in Thread: ENERGIA

Hi everyone,

So I found a weird behavior. All this in ADC0, didn't fully tested ADC1

When I change the ADC max sample rate in RCGC0 for some reason the ADC clock gets disabled and I don't know why. I know they are legacy registers but is this normal?

Also, why is there no Tivaware function to set up the ADC max sample rate? Not in the legacy registers, nor on the ADC registers. Is the only way through HWREG / direct register method?

  • 0
    Guru 47900 points

    Luis Afonso said:
    ... why is there no Tivaware function to set up the ADC max sample rate?

    Indeed that would be nice - but (some) limits in supplied/tested vendor functions must occur - don't you agree?    (and - I'd bet - you can come up w/many more...)

    To address your specific question - that sample rate may impact multiple ADC registers and/or mechanisms (and may require some time period to "rattle thru") - thus the disabling proves safest.

  • 0 in reply to cb1
    Guru 20670 points

    True,

    But I think in your StellarisWare version you must have there that function is present. What the hell did I write? That's even worse than I normally write. I think in StellarisWare, which you should have 1 around, I belive, you will find a function that serves that purpose. It should be called SysCtlADCSpeedSet().
    Energia actually has that function with Tiva too and does that register access, which like I said causes the ADC peripheral clock to be disabled.

  • 0 in reply to Luis Afonso
    Guru 47900 points
    Indeed we have StellarisWare (its all our key clients have approved!) and you're right!

    Confess that we've not noted issues - never paid much attention - and when "serious" analog measurements are required - we employ "pro - dedicated to purpose ADCs."

    Thinking bit more about your request - believe that Amit - long ago (here) - may have shed some "insider" light as to why this changed from Stellaris...
  • 0 in reply to cb1
    Guru 20670 points
    I've have seen your "tendency" if that's how I should call it, to use older (but good) and much more tested libraries vs new and/or easier to use libraries and tools.

    It's probably because that function uses legacy registers, already with the older stellaris launchpad they were legacy, so they must be trying to get them out of future codes.
    Still my real question is,

    Why does the ADC get disabled? Will have to wait for Amit/Sai answer :/
  • 0 in reply to cb1
    Guru 47900 points

    cb1- said:
    that sample rate may impact multiple ADC registers and/or mechanisms (and may require some time period to "rattle thru") - thus the disabling proves safest.

    Did the response (above) not satisfy?

    And re: StellarisWare 9453 - that's NO "tendency" that's cast in stone - enforced by key (el grande) clients...

  • 0 in reply to cb1
    Guru 20670 points
    oh, I didn't understand clearly. Thank you cb1.