MibSPI on RM46L852

Doug Clarke

Other Parts Discussed in Thread: HALCOGEN

Hi,

I have a LaunchXL2 RM46 and followed the Hercules Tutorial: MibSPI Overview.

I am now trying to communicate between MibSPI1 (master) and MibSPI3 (slave). I have used HALCoGEN to provide me with the necessary settings and I have attached jumper cables as follows:

Pin95 MibSPI1CLK J6.7 -> J2.7 MibSPI3CLK Pin53

Pin93 MibSPI1SIMO J9.6 -> J5.6 MibSPI3SIMO Pin52

Pin94 MibSPI1SOMI J9.7 -> J5.7 MibSPI3SOMi Pin51

Pin105 MibSPI1NCS[0] J9.3 -> J6.5 MibSPI3NCS[0] Pin55

I can successfully transfer data in Three-Pin Mode, however as soon as I enable CS_0 the data coming over the SOMI line is delayed by by a clock pulse therefore meaning that I get a leading zero and all my data is offset by 1 bit.

Could you advise me as to what I can do to correct this please.

Thanks

over 11 years ago

0 KARTHIKEYAN RAJAMANICKAM over 11 years ago

TI__Genius 11645 points

Hi Doug,

Can you pls quickly check if you have any values populated on to the T2C,C2T delay registers (27.9.19 SPI Delay Register (SPIDELAY) - RM46TRM).

You can also refer to "Table 27-55. Timing Parameters of SPI/MibSPI Pins in Master Mode" from - RM46TRM

0 Doug Clarke over 11 years ago in reply to KARTHIKEYAN RAJAMANICKAM

Prodigy 50 points

Hi Karthik,

Thanks for the suggestion, however all delays are set to 0 for both MibSPI1 and MibSPI3 and the signal appears to match that given in section 27.12.1 of SPNU514B-April2015 (RM46 TRM).

I assume that I can use MibSPI3 in slave mode with just SPICS enabled and don't have to use it in conjunction with SPIENA?

One observation I have made is that mibspiInit() pulls both the SPICLK and the SPISIMO lines low. SPISOMI remains high. Is this correct or should SPISOMI be low as well?

Thanks,

Doug

0 Jean-Marc Mifsud over 11 years ago in reply to Doug Clarke

TI__Mastermind 22375 points

Doug,

Are you using MIBSPI1 and MIBSPI3 in Multi Buffer mode or in legacy mode?

It will be good if you can share the Halcogen project when 4 pins mode is used so we can have a look.

If you are using Multibuffer mode, please have a look at the following post:

Please let me know.

0 Doug Clarke over 11 years ago in reply to Jean-Marc Mifsud

Prodigy 50 points

Hi Jean-Marc,

Apologies for the delay, but I have been on leave.

I am using multi-buffer mode and as far as I can tell I have configured it according to the recommendations in the post you referred to; Only using one transfer group (TG0) and one chip select (CS0), the remaining pins have been configured as GPIO.

I have attached my project as requested.

Regards,

Doug

2148.MibSPI.zip

0 KARTHIKEYAN RAJAMANICKAM over 11 years ago in reply to Doug Clarke

TI__Genius 11645 points

Doug,

Sorry for the delay.

But I got a chance to check your code today which had the C2T Delay being set to '0'. As stated in my first post pls add C2T dealy and the test should work as expected.
I did change the following and was able to see proper data transfer happening properly.

mibspiREG1->DELAY = (uint32)((uint32)6U << 24U) /* C2TDELAY */

0 Doug Clarke over 11 years ago in reply to KARTHIKEYAN RAJAMANICKAM

Prodigy 50 points

Thanks Karthik that worked. I had misunderstood your initial post.

Regards,

Doug

Arm-based microcontrollers

Arm-based microcontrollers forum

MibSPI on RM46L852