hi,
i am working on TM4C1294XL Lauchpad , is it possible to do trace and system analysis on this board in ccsv6. If it is possible, can you please refer any link or references.
Thanks in advance.
Regards,
Krithika.S
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hi,
i am working on TM4C1294XL Lauchpad , is it possible to do trace and system analysis on this board in ccsv6. If it is possible, can you please refer any link or references.
Thanks in advance.
Regards,
Krithika.S
From the TM4C1294 data sheet
"2.2.3 Trace Port Interface Unit (TPIU)
The TPIU acts as a bridge between the Cortex-M4F trace data from the ITM, and an off-chip Trace
Port Analyzer, as shown in Figure 2-2 on page 83."
[edit] From the signal table
"
TRCLK 45 PF3 (15) O TTL Trace clock.
TRD0 44 PF2 (15) O TTL Trace data 0.
TRD1 43 PF1 (15) O TTL Trace data 1.
TRD2 42 PF0 (15) O TTL Trace data 2.
TRD3 46 PF4 (15) O TTL Trace data 3.
"
Is this somehow different from trace? Is the data sheet in error?
Robert
Hi Robert,
Two outsiders agree - the "defining" thread seemed not impressive.
Suicide is a "self-inflicted" condition - an IDE - long "depriving" its users of "normal/customary" SWD usage - may prove an equally (poor) and clearly, "self-inflicted" choice... Locking oneself into a "single source" - when a wealth of M0, M3 (soon M7) beckon - (somehow) seems misguided - does it not?
A proper IDE may well enable the achievement of poster's goals - so any "separation of issues" appears (slight.)