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Tiva129 Flash Erase Cycle Question

Aaron Geier
Intellectual 600 points

Hello,

The 100,000 cycle specification has a footnote "a" that defines a program cycle as changing a bit from a 0 to 1 or 1 to 0 (see screenshot of datasheet below).

Does this footnote in the specification mean that each bit can be changed 100,000 times?  I'm looking for the granularity of this specification.  I'm exploring using a section of internal flash for data logging purposes and want to consider the PEcyc in that exploration.

  • 0
    Guru 27665 points
    That's how I would read it, but TI should clarify for you.

    However, for this type of application you should also note how the program and erase time vary with age.

    Also, and I don't know that his is an issue, but I have run across situation where if power is lost/ or a reset occurred not only could the bytes being programmed be corrupted but so could other areas.

    Robert
  • 0 in reply to Robert Adsett
    Guru 47900 points

    This (tech) reporter echoes poster Robert's writing - especially "part deux" - in which corruption extended beyond the targeted region.     Now this may have occurred w/"another's" ARM MCU - I can't recall.    (this is not a "knock" at this vendor - just a confirmation that Robert is not alone in so reporting...)

    May I add that there's another - far more brutal pitfall - which thus far has escaped mention?    If - for any reason (i.e. power glitch/disturbance, code running amuck etc.), we have seen where ALL 100K cycles are "exhausted" in one go!    Not good that!

    Your application may deserve - and will surely benefit - from a more standard, non-volatile - data storage technique...    (these exist for (good) reason...)

  • 0 in reply to cb1
    Guru 27665 points

    cb1- said:
    Your application may deserve - and will surely benefit - from a more standard, non-volatile - data storage technique...   

    Agreed, unless their is volume to support it using internal flash is an added cost. And there are a lot of external options, serial FRAM for simplicity, speed and life to on board NAND and SD cards for capacity.

    Robert

  • 0 in reply to Robert Adsett
    Guru 47900 points

    At (real) volumes you are correct - "if" the potential "loss of that stored data" does not prove catastrophic!    (we're not told the criticality of product's usage)

    That said - for 95%+ here - such volumes are not, "in play" and I believe, "Design ease/speed coupled with robust data storage/retrieval" must stand, "center stage!"

  • 0 in reply to cb1
    Guru 27665 points
    Agree fully cb1.

    Robert
  • 0
    TI__Guru**** 244400 points
    Hello Aaron,

    The footnote mentions that a Program and Erase Cycle is defined as switching the bits from 1 - 0 - 1. The method of writing Program/Erase cycle is with respect to the parameter PEcyc

    Regards
    Amit