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Hercules RM48L952ZWT FEE Bank 7

Other Parts Discussed in Thread: HALCOGEN

Hello. We are using the Hercules RM48L952ZWT board from TI. In HalCoGen 4.03.00 we have enabled FEE (see uploaded HalCoGen setup for FEE). We have downloaded the FEE drivers from TI has well to install/use the TI library F021_API_CortexR4_LE_v3D16.lib.

Questions:We are only able to read/write at most 16 bytes at any given time using the test code from TI below, or it returns a fail when we try to pass more than 16 bytes. We would like to at most write 500 bytes in a given write cycle. Is this possible or is there a limitation in the F021 library which is why the sample code provided is written in this way? Is it Ok to use standard C pointers to FEE to read from FEE Bank 7, or do we need to use the FAPI API routines (i.e., Fapi_doMarginRead, etc.) do to the reads from FEE and this is the root cause of the problem?

static Fapi_StatusType bsp_FEE_FlashBytesWithEcc(const uint8_t pui8SourceBuffer[], const uint8_t pui8DestBuffer[], uint32_t ui32Length)

{

uint32_t ui32BankWidth;

uint32_t ui32BytesLeft = ui32Length;

Fapi_StatusType FapiStatus = Fapi_Error_Fail;

uint32_t ui32BytesToProgramm = 0ul;

uint32_t ui32DestAddress = (uint32_t)(&pui8DestBuffer[ui32Length - ui32BytesLeft]);

/* Bank Sizes (Refer to Datasheet) */

/* Device Main Bank 7 */

/* RM57 288 72 L2FMC! */

/* RM48 144 144 */

/* RM46 144 144 */

/* RM42 144 72 */

/* Address Memory Type */

/* 0xF010_0000 EEPROM Bank 7 ECC */

/* 0xF020_0000 EEPROM Bank 7 Data */

/* 0xF040_0000 Flash Bank 0-1 ECC */

if ( ((uint32_t)(&pui8DestBuffer[0]) < 0xF0400000ul) && ((uint32_t)(&pui8DestBuffer[0]) >= 0xF0100000ul) )

{

/* Destination points to EEPROM Bank 7 */

/* For RM48 Bank width for Bank 7 is 144bits (128 data + 16 ecc) */

/* Extract EE_BANK_WIDTH field from FCFG_BANK and remove Parity and ECC width */

ui32BankWidth = WIDTH_EEPROM_BANK; /* Get Bank Width in Bytes */

}

else

{

/* Destination points to Main Banks */

/* For RM48 Bank width for Main Banks are 144bits (128 data + 16 ecc) */

/* Extract MAIN_BANK_WIDTH field from FCFG_BANK and remove Parity and ECC width */

ui32BankWidth = WIDTH_MAIN_BANK; /* Get Bank Width in Bytes */

}

while (ui32BytesLeft > 0)

{

/** @note The following two unsigned modulo will be implemented with a function placed in the Flash (__aeabi_uidivmod)

* and thus require two far call trampolines if compiled in ARM state!

*/

/* Program the first portion of the data with a Width that aligns adjacent writes on the Flash Bank Width */

ui32BytesToProgramm = ui32BankWidth - (ui32DestAddress % ui32BankWidth);

/* Assure that not to much data is programmed */

if ( ui32BytesToProgramm > ui32BytesLeft )

{

ui32BytesToProgramm = ui32BytesLeft;

}

FapiStatus = Fapi_issueProgrammingCommand(

(uint32_t *)(ui32DestAddress), /* Destination Address*/

(uint8_t *)(&pui8SourceBuffer[ui32Length - ui32BytesLeft]), /* Start of Source Data Buffer */

ui32BytesToProgramm, /* Data Byte to Program */

NULL, /* Start of Source ECC Buffer */

0, /* ECC Bytes to Program */

Fapi_AutoEccGeneration); /* Programming mode */

if ( FapiStatus != Fapi_Status_Success )

{

ui32BytesLeft = 0;

}

else

{

/* Wait till program command has finished */

while (Fapi_checkFsmForReady() == Fapi_Status_FsmBusy);

/* Check for errors during program */

if ( 0ul != Fapi_getFsmStatus() )

{

FapiStatus = Fapi_Error_Fail;

ui32BytesLeft = 0;

}

else

{

ui32DestAddress = ui32DestAddress + ui32BytesToProgramm;

/* The result of the following statement is assured to be equal or grater than 0 */

ui32BytesLeft -= ui32BytesToProgramm;

}

}

}

return FapiStatus;

}

.