SafeTI Diagnostic Library 2.2.0 demo issu

Jhon zhu

Other Parts Discussed in Thread: RM48L950, HALCOGEN

Hi !

I have a RM48 HDK and I have run the demo the <SafeTI Diagnostic Library> provides

(C:\ti\Hercules\SafeTI Diagnostic Library\2.2.0\demo_app\HALCoGen\RM48L950_NoOS).

I want see some reaction , so I add the some sci debug info in the main function, it’s before the SL_ESM_Init(Callback).

1, When I run it with the emulator, sometimes it works well , this time the board will the sci debug info output normally, but sometimes it stop at sys_startup.c _c_int00()

if ((esmREG->SR1[2]) != 0U)

{

for(;;)

{

}/* Wait */

}

And this time the esmREG->SR1[2] will be 0x00000002 or 0x00000082.

This issue seems doesn’t have any regulation.

2, When I run it without emulator, I can’t see any output from sci, so I think maybe it stop at the same point. Cause the sci is unavailable, I tried to use the het led as a debug tool, unfortunately when I add hetInit() before the esmREG->SR1[2], the program abort at _excpt_vec_abort_pref().

ps: my other program without safety lib works well.

over 10 years ago

0 Zhaohong Zhang over 10 years ago

TI__Mastermind 22715 points

The value you observed in esmREG->SR1[2] indicated the following.

esm group3 channel 1: Efuse autoload error (0x2)
esm group3 channel 7:uncorrectable FMc ECC error(0x8).

Since your code works fine without safety lib, It seems that error flag is not cleared properly after some diagostic tests. To further debug this issue, I would suggest you to try the following.

(1) Make sure that the entire Flash memory (not just the area used by your test) is programmed with correct ECC.
(2) At address 0x0 (in the interrupt table), change instruction "b c_in00" to "b #-8". After this change, CPU will loop at address 0x0 after reset and then you can use debugger to control the execution. In this way, you should see the same behavior for each run.

You need to to make sure that your test runs correctly with debugger first.

Thanks and regards,

Zhaohong

0 Jhon zhu over 10 years ago in reply to Zhaohong Zhang

Intellectual 370 points

Thank you for your support

1, Yes I refer the datasheet about the this (esmREG->SR1[2]) error, but I do noting before this error but using the safeTI lib provides sys_startup.c, and the sys_startup.c don’t have operations clearing error bit. in addition the demo seems don’t have any flash operates, and in the main function I do nothing but output a sci info, and I also erase the entire flash each time I debug this program .

2, I did as you told me (b #-8), and run the program, but also the program stop different points , sometimes stop at else if ((stcREG->STCGSTAT & 0x1U) == 0x1U) , sometimes run normally at main end; it is just by chance.

3, Presently I can use sci even led by using safeTI lib, would you please offer me a simple stand sys_startup.c init flow using safeTI lib for RM48L950? Or some “hello world” demo by using safeTI lib.?

15311.sys_startup.c

this attachment is the sys_startup.c I'm using, this .c is only the safetTI lib provide sys_startup.c cut down #if 0

Thank you & Best Regards

0 Zhaohong Zhang over 10 years ago in reply to Jhon zhu

TI__Mastermind 22715 points

To make the test repeatable, I would suggest the following.

(1) generate a power-on-rest.
(2) connect to debugger to CPU and move PC to c_int00.
(3) set a breakpoint at the desired location.
(4) see if CPU reaches breakpoint correctly

You can move the breakpoint further till the error is observed. In this way you will be able to find out which section of the code causes error. I suggest repeating the above the steps for each run. Do not run from breakpoint to breakpoint.

Thanks and regards,

Zhaohong

0 Jhon zhu over 10 years ago in reply to Zhaohong Zhang

Intellectual 370 points

Thank you for your post

I did as you told, now the program is repeatable. After a CPU self-test RM48L950 will reset, and after the reset we stop here, which means self-test has complete, that’s why the main function didn’t output sci debug info.
else if ((stcREG->STCGSTAT & 0x1U) == 0x1U)
{
__asm(" b #-8 ");
/* Self-Test Fail flag is set */
if ((stcREG->STCGSTAT & 0x2U) == 0x2U)
{
/* Call CPU self-test failure handler */
cpuSelfTestFail();
}
/* CPU self-test completed successfully */
else
{
/* clear STC global status flag */
stcREG->STCGSTAT = 0x1U;

/* Continue start-up sequence after CPU STC completed */
afterSTC();
}
}
Q1, why would the demo stop after the Self-Test has complete? Since it stop the fallowing code make no sense?

I comment the __asm(" b #-8 "); the demo stop in cpuSelfTestFail(), the STCGSTAT is 0x00000003 and the STCFSTAT is 0x00000004, the STCTPR is 0xFFFFFFFF, which means Self-Test has Failed because of timeout. Here is the self-test configure:
stcSelfTestConfig.stcClockDiv = 0; /* STC Clock divider = 1 */
stcSelfTestConfig.intervalCount = 1; /* One interval only */
stcSelfTestConfig.restartInterval0 = TRUE; /* Start from interval 0 */
stcSelfTestConfig.timeoutCounter = 0x1; /* Timeout counter*/
I tried increased the timeoutCounter, things never changed until 0x1000.
Q2, why would the demo set timeoutCounter 0x1?

After all , finally, I get in my main function, I can see my lovely sci debug info!!

Thanks a lot!! Zhang!

Thanks & Best regards

0 Zhaohong Zhang over 10 years ago in reply to Jhon zhu

TI__Mastermind 22715 points

What you found are definitely software bugs in the demo.

I guess that someone forget to remove " __asm(" b #-8 ");" after debugging. The timeout out counter define the total number of VCLK cycles before the timeout flag is set. We normally put a big value (0xffff, for example) there. I will pass the information to the team reponsible for the safety library. It seems that your issue has been resolved. Would you please close this thread?

Thanks and regards,

Zhaohong

0 Jhon zhu over 10 years ago in reply to Zhaohong Zhang

Intellectual 370 points

Ok! I'm very glad to !
Is "close the thread" means verify an answer? If so, I have verified an answer!

Thanks & Best regards

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SafeTI Diagnostic Library 2.2.0 demo issu