Hi,
We have discovered a problem in our hardware design related to the hibernation logic. Our application uses a push button to power on/off our device and the idea was to use a GPIO input to debounce and monitor the button status and turn off the device after the button has been held for a while. As such the push button signal is connected both to \WAKE (in addition to the circuitry shown in figure 7-4 "Using a Regulator for Both VDD and VBAT" in the datasheet) and PK6.
This does not work since PK6 drains current from the pull-up to VBAT as soon as VDD is removed. Thus the processor wakes itself up as soon as we enter hibernation.
I am looking for a way to solve this problem and the simplest way would be to skip PK6 entirely if there was a way to monitor the \WAKE pin when the MCU is on. I saw that one difference between TM4C123x and TM4C129x is that the external wake interrupt can be used in run, sleep and deep-sleep mode. Is there a way to check if the signal is low over time?
Kind regards
Per E
