I have the follwing SPI lines in HW (MCU is TM4C129ENCZAD)
SPI_CLK PA2
SPI_CS PA3
SPI_MOSI PA4
SPI_MISO PA5
So far the code is completely untested since we do not have the HW yet.
I need to set up a legacy SPI connection, I want to use SSIDataPut and SSIDataGet for data transfer. No need for DMA or interrupts.
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | SYSCTL_XTAL_12MHZ);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
SysCtlPeripheralReset(SYSCTL_PERIPH_SSI0);
GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4); // TX, CS, CLK are set as output
GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_5); // RX is set as input (SSI0_MISO)
/****** start of the trouble ******/
// Error line: // GPIOPinConfigure(GPIO_PA4_SSI0TX); // define does not exist in pin_map.h
// Error line: // GPIOPinConfigure(GPIO_PA5_SSI0RX); // define does not exist in pin_map.h
GPIOPinConfigure(GPIO_PA4_SSI0DAT0); // MOSI/TX line <--- check this solution!!!
GPIOPinConfigure(GPIO_PA5_SSI0DAT1); // MISO/RX line <--- check this solution!!!
/****** end of the trouble ******/
GPIOPinConfigure(GPIO_PA3_SSI0FSS); // Chip select
GPIOPinConfigure(GPIO_PA2_SSI0CLK); // Clock
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 );
SSIClockSourceSet(SSI0_BASE, SSI_CLOCK_SYSTEM); // sets the system clock as the source of clock (redundant?)
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, SysCtlClockGet()/8, 16);
SSIEnable(SSI0_BASE);
// empty FIFO, flush unwanted junk
while(SSIDataGetNonBlocking(SSI0_BASE, &flushfifo));
An issue is, that I see a discrepancy between the file 'pin_map.h' in TivaWare_C_Series-2.1.0.12573 and the datasheet SPMS442B, Table 20-1. SSI Signals (212BGA) on page1361 .
Table 20-1 in the datasheet claims that pin PA4 is SSI0XDAT0, SSI0TX in Legacy SSI Mode <-- TX type
'pin_map.h' defines only GPIO_PA4_SSI0RX and GPIO_PA4_SSI0XDAT0 types for pin PA4 <-- RX type?
Naturally not all pins can be defined as the type one wants. Since RX and TX types are not available (see datasheet vs. 'pin_map.h' issue above), I must use the DAT lines. But should DAT0, DAT1 be in MISO or MOSI roles?
--
The question is;
Why is there RX and TX options (Legacy SPI?) and DAT0,1,2,3 (SSI extension?) option for the GPIOPinConfigure pin type?
Can DAT0 be used for MISO/RX pin and DAT1 for MOSI/TX pin? Or with DAT0 and DAT1 in swapped roles?
Should DAT0/DAT1 or RX/TX type be used for MISO/MOSI pins in LEGACY SPI/SSI mode?
Why is there a conflict between 'pin_map.h' and the datasheet?
The answer is urgent because we need to verify that our board layout is correct !!!
