I am trying to configure UART1 of TM4C123FH6PMI for receiving bytes. As soon as UART is enabled, break and frame error are reported on Status register. This happens though no bytes are sent to microcontroller's UART. Here is my UART configuration code, can somebody point out, what is going wrong? This source code uses TivaWare APIs at places.
{
IntDisable(INT_UART1);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1);
SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UART1);
//
// Configure hardware pins and UART control register
GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1);
GPIOPinConfigure(GPIO_PB0_U1RX);
GPIOPinConfigure(GPIO_PB1_U1TX);
UARTFIFODisable(UART1_BASE);
//
// Enable the UART peripheral interrupts. Note that no UART interrupts
// were enabled, but the uDMA controller will cause an interrupt on the
// UART interrupt signal when a uDMA transfer is complete.
//
IntEnable(INT_UART1);
UARTIntEnable(UART1_BASE, UART_INT_RX);
//
// Configure the UART communication parameters.
//
uint32_t ui32Baud = 38400U;
uint32_t ui32Div;
//
// Is the required baud rate greater than the maximum rate supported
// without the use of high speed mode?
//
if((38400U* 16) > SysCtlClockGet())
{
//
// Enable high speed mode.
//
HWREG(UART1_BASE+ UART_O_CTL) |= UART_CTL_HSE;
//
// Half the supplied baud rate to compensate for enabling high speed
// mode. This allows the following code to be common to both cases.
//
ui32Baud /= 2;
}
else
{
//
// Disable high speed mode.
//
HWREG(UART1_BASE+ UART_O_CTL) &= ~(UART_CTL_HSE);
}
//
// Compute the fractional baud rate divider.
//
ui32Div = (((SysCtlClockGet() * 8) / ui32Baud) + 1) / 2;
//
// Set the baud rate.
//
HWREG(UART1_BASE+ UART_O_IBRD) = ui32Div / 64;
HWREG(UART1_BASE+ UART_O_FBRD) = ui32Div % 64;
//
// Set parity, data length, and number of stop bits.
//
HWREG(UART1_BASE+ UART_O_LCRH) = UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE;
//
// Clear the flags register.
//
HWREG(UART1_BASE+ UART_O_FR) = 0;
HWREG(UART1_BASE+ UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE |
UART_CTL_RXE);
}