GPIO on TM4C123GH6PM falls from 3.3V to ~1V when after 21 ms

You do not provide much (needed) info re: those FETs.

Are those "logic level" FETs - thus able to accept MCU signal levels?    Note that more "normal/customary" (power) FETs usually require VGS of 10V to fully & quickly/properly, "turn on."   Thus dedicated "gate drivers" are normally employed to boost the (relatively) low signal levels of the MCU so that they conform to normal FET drive levels & requirement.

Drop of GPIO output voltage  may indicate that you're drawing too much current from the GPIO - there are even restrictions as to how much current may be drawn from, "Any of the 4 sides of these MCUs!"   (other makers enjoy the same limitation - btw)

Pull down resistors you mention are too weak to be suspect - I'd look (closely) at those resistors placed in series w/FET gate - yet FETs are not noted for requiring high current drive - once the gate capacitance (from several FET structures) is overcome...

I'd remove all connections to those MCU pins (which exhibit dropped voltage output) and repeat your tests.

There is a mechanism by which you can increase the MCU's GPIO output current (up to 8mA iirc) - such may assist your efforts...

As always - when such report arrives - everything is suspect!    Have you monitored the voltage input into your board - especially the 3V3 to the MCU - during your tests?   (especially when the GPIO output voltage "drops?")

Unstated is "How you're powering the FETs and relays" - "stealing power" from an eval board is not famed as fully appropriate for driving power-seeking accessories!

Hello Martin,

Please check the errata on TM4C123 devices. There is a known IO Latch Up issue on TM4C123 which is described in the errata and the above mentioned matches the symptoms. There is a WA also prescribed in the rrata.

Regards
Amit

Hello,

the FET I use can be switched by a logic level of 3V  I also monitored the 3,3V input. Everthing is fine with it during the switching process.

GPIO Ports are configured to 8mA slew drive. 

I could fix the problem by adding a 1uF capacitor in parallel to the GPIO port as described in the errata.

Everything works great now :-)

Thank you much fpr your support.

Best regards

Martin

Good for you - glad you persisted and it's always nice to see the "issue-loop" become complete.

That said, is it reasonable to question just how this vendor would have reacted if your "payment" had similarly extinguished - "post that 21ms interval?"    And of course - your payment would have been accompanied with similar, (helpful) "payment errata."    (this bill will self destroy in 21mS...20...19...)

Hello cb1,

More than the duration of the switching this errata looks at the slew rate of the edges. Relays are notorious for the edges generated during switching.

Regards
Amit

Hi Amit,

I've not looked at that errata - but firm/I have employed high power relays, substantial power actuators - and I have zero recall of the "need" to add such, "helper caps" to GPIO outputs - so that their programmed levels may sustain.    Indeed we do all that's reasonable to reduce & manage inductive "kickback" - but most always that occurs at/near the "offending" device - not at the MCU.

While anecdotal - I can report that we've recently used (past) LX4F to drive powerful yet compact BLDC motors - with peak currents in excess of 100A (per Tek current probes) with the LX4Fs directly connected to standard gate drivers.    Those gate drivers then drive "290A" rated power FETs (sub 1mΩ RDS(on) - there is NO sign of glitch upon any of the 6 LX4F outputs - certainly no, "giving up" after 21mS!   (Thank God)

As it has long been reported that TM4C = LX4F (w/paint job) - and we've never noted such "21mS, GPIO extinguish, horror" - have we simply been, "lucky?"

Hello cb1,

It depends on the PCB layout as well. I have seen design where for extremely good signal interfaces, the lack of a reference GND has wrecked the latch up more than what we do under lab conditions.

Regards
Amit

Hi Amit,

My report with "high power drive" - originating from LX4F MCU - is far from "pristine lab environment."

We're driving a powerful BLDC motor - clamped to a hydraulically cooled Dyno - and "lose the sense of hearing" after each/every 15 minute test/verify/data grab session.

Our boards employ "selective" 4 ounce copper plating along the major power paths.  (which - of course - are W I D E and direct/short.)  

We've (never) seen that (dreaded) 21mS glitch...   Might that be confined to just some MCU pins?    (such (21mS) never appeared w/in (past) LX4F errata...)

Hello cb1

The IO's are mostly the same across the device. So it is not limited to just a few IOs. Under Lab conditions of high slew rate spikes in the 5V region and elevated temperatures it is very easy to latch up the IOs.

Regards
Amit