How to use 16 HTU Channels for 64 HET Pins?

Hello Karthikeyan,

  I will suggest you rearrange your code sequence slight so you don't have to use all 8 HTU channels per N2HET. Instead of replicating the CNT->MCMP pair 8 times, you can do something like below. Here I'm using an example with two CNT->MCMP pairs. You can expand on this idea.

L00 CNT   { reg=A, ......}
L01 CNT   { reg=B........}
L02 MCMP { ........ reg=A,......};
L03 MCMP { ........ reg=B,......};


In this code sequence you just need to setup one HTU channel to update the data field of both MCMP instructions since these two MCMP instructions are next to each other. You will setup 
ADDMH for increment by 16 bytes and IHADDR pointing to the first MCMP data field. In the ITCOUNT register, you will change the IECOUNT to 2 instead of 1. 

One note I want to add is that the example assumes that your application can somehow allow to change the data field of the second MCMP the same time as the first MCMP. The reason is that different MCMP in your application may have different compare value. When there is a compare match in the first MCMP, you generate a DMA request to the HTU and HTU will not only update the data field of the first MCMP but also the second MCMP. So your second MCMP data field may be updated earlier or later than it would have generated its own DMA request to the HTU. If your application can tolerate this then the example will work. Perhaps you want to evaluate which two of the 17 pins can tolerate this.

Hi Charles Tsai,

Thanks for your ideas.
In my setup no two het instruction are to be updated at the same time. So I cannot use the first trick. Seperate trigger is needed for every instruction as they has separate timings.

So I am coming to the second solution. It may be useful for me. But I am having a doubt in that trick.

When I am trying to implement the second trick, I encounter a problem described below.

For example,
My 16th MCMP HET Instruction is using 7th HTU channel of HTU2 unit. So DCP7 is configured to by-pass a trigger to HTU2 unit and not to DMA.
i.e:
HET2->HETREQDS &= ~((1<<23) | (1<<7)) ;

So How can I write 17th MCMP HET Instruction to trigger DMA instead of HTU2 using same 7th DCP?

or else clearly,
Is it possible to write two HET Instructions in such a way that one instruction is to trigger HTU and other instruction is to trigger DMA but both are using same channel / reqnum but? How?

For example.

L00 CNT   {  reg=A, irq=OFF, max= 9,reqnum=7, request= genreq } ; I want this instruction to trigger DMA using N2HET2 DMAREQ[7] Channel.
L01 ECMP {  en_pin_action=ON, pin=0, action=PULSELO, reg=A, data= 4} ; This data field updated by HTU2 and control pin 0.

L02 CNT   {  reg=A, irq=OFF, max= 15, reqnum=7, request= quiet }; I want this instruction to trigger HTU2 using N2HET2 HTUREQ[7] Channel. That's why I put request=quiet here. (to give request only to HTU).
L03 ECMP {  en_pin_action=ON, pin=1, action=PULSELO, reg=A, data= 5}; This data field updated by DMA and control pin 1.

In the third line of the above example code, I used request = quiet. I believe that quiet request will be given only to the HTU and not to DMA to initiate transaction. But in TRM, it is specified that Quiet requests are not to initiate the transaction and only to detect the request lost. If it's that so, I can not give a trigger to HTU alone isn't it? Please clarify about quiet request. May be I can use GenReq to trigger DMA and Quiet ReQ to trigger HTU for my objective, if I clear in using Quiet requests.

And also another doubt sir. Just now I have this doubt while referring the TMS570LC4357 trm.

TMS570LC4357 TRM says that,
N2HET1 DMAREQ[4] to N2HET DMAREQ[7] are mapped to DMAREQ[20,21,24,25]
and at the same time N2HET2 DMAREQ[4] tp DMAREQ[7] are also mapped to the same DMAREQ[20,21,24,25].

This means that we can use N2HET1 DMAREQ[4] or N2HET2 DMAREQ[4] at a time.
So theoretically N2HET can trigger 8 DMA Channels but actually it can only trigger 4 DMA Channels out of available 8 DMA Channel.
(This is what I understand from TRM. May be this is wrong. If wrong, please corect me sir.)

Please give some guidance sir.

Thanks in advance.
Karthikeyan.K

Hi Charles Tsai,

A Great Thanks for your support in clarifying my doubts until now.

Actually I don't want to use Interrupt in my project. Because I am using Free-RTOS in TMS570LC4357 controller and using 1ms, 10ms Tasks.

I doubt about that using interrupt will make my RTOS code to be stopped for reasonable time (I am performing very time-critical tasks). This will conflict my concept of execution flow.

But anyhow if suppose interrupt routine is just to trigger a DMA channel which is already configured to transfer elements to N2HET RAM, this will not corrupt my other code timings. So I can use Interrupt concept as you mention.

Ok sir.

If I am using Interrupt concept, and my 17th instruction is giving interrupt, then there is no complexity to detect which instruction is giving interrupt since only one instruction is giving interrupt. So my concept is done.

But for understanding purpose I am asking this.

If I am using two instructions to give interrupt then how to detect which instruction is giving interrupt?

(By reading which register or any other way).

Thanks in advance.

Regards,

Karthikeyan.K