Tiva C - Custom PCB

Hello Mathieu

The bulk cap should be placed near pin 56 and one small cap can be placed near pin 25.

Regards
Amit

Might your acquistion - then focused review of the "component placement strategy" of a, "Launchpad" - prove of great interest & value?

Good & practiced sailors, "Steer to existing, "known good" charts."   Novice sailors too often, "push off" w/out such charts - rocky shores await - yet could be predicted & avoided...  Could there be a, "parallel?"

Hello cb1,

The component placement is a part of the System Design Guidelines. The section on Power pins and especially VDDC mention the same for each of the packages.

Regards
Amit

Indeed - yet one hopes the, "better promoted" LaunchPad practices that which the Sys. Dsn. Guide preaches. That was my suggestion... (and we must note that user "missed" that Dsn. Guide - first time around...)

Hi, I follow your previous advice. I must do a Custom PCB, but i retrieve the PCB guideline & Launchpad Layout. So i will try to stick close to something that has been tested and proved to be working.

Hi,

near pin 56, I placed a (2.2 uF // 0.1 uF) and near pin 25, I placed ( 1uF // 0.1 uF). I linked the 2 pins with a larger&shorter tracks under the MCU ( 0.5mm width).

As always - when you first, "Power up" such custom board - the use of a current-limited power supply is highly recommended.
You must fully comply with the voltage input spec of your 3V3 regulator - too high or too low will yield trouble...

Hi,
I use the TPS736 voltage regulator to regulate my 3.3V. However, I am planning to use the SOT-23 package. Can it affect the perfomance of my PCB compare to the DRB package which is used on the LP?

Would not your "side by side" review of the device specifications best answer?

In general - the smaller the device - the less its power dissipation capability.    Voltage regulator's, sometimes, "dropping out of regulation" (due to their being under sized/rated) - may produce transient effects which prove very difficult to test/troubleshoot.    (i.e. best to "over deliver" on current capability - especially with a new board and/or project.   Later, when much program & board familiarity has been gleaned, proves a better time to "shrink" size/cost...)
 
Without knowing your board's total current requirements - and how high you set your system clock - it's not possible to properly respond...

Hi,
I am planning to use the tm4c1233h6pm, in the "current consumption" section, the highest consumption happen when using the external oscillator combine with the PLL. Which is about 44.2 mA. I don't plan to implement an external oscillator in this iteration. So a Voltage Regulator which can deliver 400 mA is suitable?

If "only" the MCU populates your board then the regulator's current capacity you specify is fine - even preferred.    Do note that - the more your input voltage to that regulator exceeds its output voltage - the greater its dissipation.   And - often such regulators have strict limits upon input voltage.   Comply.

You may wish to include key "vias" or real "test points" - so that you, "Speed, ease & enhance" your test/troubleshooting.   

Most of our firm's clients get into trouble by moving "too fast" to the smallest board - without a well designed plan (i.e. NO plan!) for test/troubleshooting.   Eased access to key/critical points is, "worth its weight in gold" - should not be "bypassed" by rush...

Hello Mathieu,

As cb1 already said, and you have duly noted, another method is to limit the current source from the input of the LDO. if you have a power supply then you may want to limit the current at that point.

Regards
Amit

What is the number 1 issue I am suppose to look when making a custom PCB? My cap are near the correct pins with the same value from the LP what else should be take into account?

Hello Mathieu

Please elaborate what you meant by #1 issue to look at?

Regards
Amit

Hi, I mean for the programming of the MCU. Is the only concern on the MCU are the caps? Can the tracks placement affect how the MCU act? I don`t want to send a other faulty design into production. Like placement of VDD tracks vs programming tracks. On the LP, there seem to be some kind of shielding with the GND track because there is GND around the GPIOS pin.

Hello Mathieu

How many layer board are you fabricating? The JTAG tracks must have an external Pull Up and must be kept short and straight for good results on signal integrity. The VDD tracks and VDDC track reference is already a part of the System Design Guide.

Also can you add a snapshot of where GND shielding is being done on the LaunchPad?

Regards
Amit

Hello,

I am doing a 2 layer PCB made on copper PCB. What lenght is recommend for JTAG tracks?

For the shielding, on the following picture you can see a GND track going around GPIO

First question, do you really have traces curling around vias like that? I.E. covering 240 degrees on one via before moving to the next and doing the same.

Also go to four layers. There's not a significant cost difference in low volume and a pair of power planes simplifies routing while improving signal integrity.

Robert

Hi,

this is what the JTAGs look like this:

No, I don t see traces on the LP but still what are those tracks in the LP layout files? Also , our prototype PCB machine cannot make 4 layers PCB.

Mathieu L. said:

Also , our prototype PCB machine cannot make 4 layers PCB.

You're using a milling machine?  If so that may explain that strange appearing red 'track', it's typical of milling paths.

I stopped using milling machines when it became apparent that prototype board houses delivered higher quality for less and often faster.

Robert

Hi,

I am not sure about the machine name, but we take 2 sheet of copper separate by an insulator and a machine build the track by cutting the track into the copper sheet. Here I got an example of the result:

(This image is just to show the PCB, it doesnt have any link with the current task)

That's a milling machine.

Robert

The design & implementation of a pcb carrying near 100MHz signals is non trivial.   Many would say a proper design contains both, "Science & Art."

And - a fairly large inventory of electronic design - component selection & placement skills are required.   Might this be - at this stage in your engineering career - a bit of an, "over-challenge?"

It was past suggested that you employ the existing - low cost - Launchpad - and limit any, "custom pcb effort" to those features you wish to add.   The 2 boards may then either cable or plug together.

We note that time spent mastering too many, highly specialized tasks, subtracts from time available to increase your MCU knowledge.   And - of course - should this forum expand to include every single - weakly related - MCU niche activity?    Should there (ever) be (any) limit?   (unguided forum - you know!)

Sometimes it becomes necessary to "revisit" early decisions - and (perhaps) adopt a different (and more productive) path... 

cb1- said:

The design & implementation of a pcb carrying near 100MHz signals is non trivial.   Many would say a proper design contains both, "Science & Art."

Agreed, I wouldn't use less than 4 layers for a modern ARM.  Some risks are not worth the return.

cb1- said:

It was past suggested that you employ the existing - low cost - Launchpad - and limit any, "custom pcb effort" to those features you wish to add.   The 2 boards may then either cable or plug together.

Let me echo and emphasize this. That lets you use parts with standard 0.1" spacing which are much better suited to  your chosen board manufacturing technique. If you don't take this path I fear you will spend most of your time fighting quality issues with fine pitch components on a milled board. Even with this approach I think you'd be further ahead getting boards from a prototype house.  You are more likely to get multiple boards and spares are generally useful to have around (even discounting the other quality issues).

Robert

Robert Adsett said:

I fear you will spend most of your time fighting quality issues with fine pitch components on a milled board

Two now have risen to (repeat) this suggestion!    And it may be that each has had (past) experience - and seek only to "steer" you from harm.

"Jack of all Trades" becomes increasingly difficult - painful - and unrewarding!    This is the age of specialization - you'd do well to learn that now - and "focus" on that which most matters.

Just because you, "Might be able to do something" does not insure that the task is done correctly - or will not fail you - in ways & means which are hard to detect or recognize.

Hope that you sense that "two here" are not being "mean" - instead seek to save you (more) lost time/funds/effort...

Hi,

eventually, we might just take the LP design and copy it or put an adapter than can connect to the LP. Because I got a reference on high speed digital design, and there is a lot of modal to put into place. My reference is " High-Speed Digital System Design—A Handbook of Interconnect Theory and Design Practices" by Stephen Hall, Garrett Hall and James McCall

Choice is yours - yet your learning & mastery of this MCU & critical programming is (still) being, "Held Hostage" to the pursuit of specialized "pcb manufacturing" skills.    Some tasks are best left to others - especially when they block progress & deflect from your central purpose...

One doubts that, "Milling high-speed pcbs" receives great coverage in the reference you note...  (perhaps - for good reason)

Well, I talked with my supervisor, and I manage to get the permission to make the PCB outside, so multiple layer is now ON and it is a lot easier to follow guideline.

Good for you!   Again - your past method really is not best suited to the (many) demands of modern MCUs operating at high frequencies.

It always proves wise to visit your, "outside pcb vendor's site" and/or contact them - so that your board design is in full compliance with the board house's equipment, capabilities & comforts.   You should make this effort early to prevent the delay & frustration which may result should your design be "outside" the board house's "sweet spot."

Hello cb1,

The potential plan of action is to have a bare 2/4/6 layer PCB schematic and layout example for similar use cases where all major signals are done by us so that the users can use it as a fixed reference into their designs with other devices. Do you think it would be a good idea?

Regards
Amit

Hi Amit,

In general I believe that's a good idea - especially in the case of users such as this poster.

I'd suggest that all key/critical MCU pins be brought out (unblocked) as well - so that an, "MCU Nucleus" type of, "reusable" design file is created. BTW - this is exactly what our small, tech firm does - with several of our most popular MCUs - so that the creation of a more, "custom/tailored" pcb is (once again), "Speeded, Eased, Enhanced!"

By working with the same basic nucleus/framework - errors are reduced - and "test & troubleshooting" points (most always missed) may be properly implemented! (over time - these prove, "worth their weight in gold!")

Not hard to "estimate" those features/functions - absent the current LPad - which would add usefulness & value to, "LPad-like" pcb designs...

Hello cb1,

My only concern would be the naming system as some functions like SSI and I2C require a set of IO's, which may be the same as ADC set of analog functions. Or should be keep them named as the Pin Name allowing users to take care of the final connection mapping?

Regards
Amit

Amit Ashara said:

some functions like SSI and I2C require a set of IO's, which may be the same as ADC set

You are so wise, Amit.   Indeed - and our firm handles just that by routing those key/critical signals to: organized & separate "edge connectors" so that I2C signals + power, and SPI + Power, and Analog Channels + Power - enjoy their own headers!   Indeed - (some) organizational ability is forced upon the user - and a past (forgotten) "Poster Guidance Checklist" may be modified to, "PCB Designer Checklist" which steers & guides Users to success.   (or at least gets them far closer...)

No design is ever, "Perfect."    Yet the alternative, "Do nothing" is far from, "Best/Brightest!"