LwIP Not working in RM 48

Maltesh,

I will ask the team that put together the demo to help with this. Can you try to follow the steps outlined on this page?
processors.wiki.ti.com/.../HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration

Are you using an RM48 HDK or one of your own design?
If your own - did you change the part # of the phy?

What I do in this case is to open the Register view in CCS and find the MDIO module tab.

With the part otherwise halted where it is in the loop polling for the PHY ID, you can poke an MDIO command into the register very easily and see how the phy replies.

Put correct values in 'USERACCESS0' for Write (0 to do a read), 'REGADDR' - the address of the register within the PHY that you want to read, and 'PHYADDR' the address of the phy on the MDIO bus. Then with these correct - set the 'GO' bit.

When you refresh -you'll see the phy's response in the "Data" field. If it looks completely off you can start checking hardware for things like switches (check S2 #4 if you are on an HDK) or pullups missing on the MDIO bus.. Or you can check the other PHY addresses to see if there may be a problem with the phy address strapping...

-Anthony