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UART Receive FIFO stays empty

Other Parts Discussed in Thread: TM4C129ENCPDT

Hi folks,


I'm working with the TM4C129ENCPDT in the current project on a custom PCB. Maybe I encountered an undocumted behavior of the UART receive FIFO.

Overview:

I configured  the UART4 having the configuration:

9600Baud, (System clock is 16MHz)

8 databits, no parity, 1 stopbit

FIFO enabled, triggerlevel at 1/8 (2 bytes)

RX and TX interrupt enabled, loopback mode enabled

UART4->IBRD=0x68;
UART4->FBRD=0x0B;
UART4->LCRH=0x70;	//Word-size (8Bit), FIFO active, 1 stoppbit  
UART4->IFLS=0x00;	//FIFO triggerlevel (1/8)
UART4->IM=0x30;	        //TX interrupt, RX interrupt
UART4->CTL=0x381;	//transmitter active, receiver aktiv, UART EN, LOOBBACK EN

Everyting related to the transmitter works fine. The interrupt handler is called after the FIFO contained less than 2 bytes.

Therefore the NVIC configuration works and the handler is correctly implemented.

Issue:

I'm not able to receive any data when the data bytes are not transfered as a packet. First I enabled the loopback mode when the initial data is transmitted by the device. There the receive FIFO and the associated interrupt works as ecpectet. Still having the loopback mode enabled I changed the data to be transmitted into three single characters, which are transmitted with a delay in between. In this case, no data is received and the receive interrupt is not triggerd. If I cross out the delays, all characters are received and the interrupt is fired.

Is there a configuration I missed during the initialisation? Futhermore, is there a possibility to avoid this behaviour?

Regards, Jannis