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Bulk Transfer - uDMA

Mathieu L.
Expert 1630 points

Hi,

I read in the Datasheet of the tm4c123 devices family, that you can set uDMA using USB channel. Can you use those channel to transfer data between the Tiva C and Host PC with the bulk device?

  • 0
    TI__Guru**** 244400 points
    Hello Mathieu

    Yes. But it would be better if you get the CPU based access working first. The configuration of uDMA is very application centric, so the regular examples would not have covered it.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Expert 1630 points

    What do you mean by "CPU based access working first"? Currently, I got a bulk transfer protocol which is working, but I don't want to use my mcu to just transfer data to the HOST pc. It would be better that the mcu let the DMA handle the transfer with the pc in a ping-pong set up. I guess, I need to modify the bulk struct but more precisely "USBDBulkPacketWrite" so that it is the DMA that make the transfer?

    Also, when I call the function "USBBufferDataWritten" how it links to "USBDBulkPacketWrite" which define as transfer function in the USBbuffer struct of the TXbuffer.

  • 0 in reply to Mathieu L.
    TI__Guru**** 244400 points
    Hello Mathieu,

    The USBBufferDataWritten calls the function USBRingBufAdvanceWrite which has the pointer to the ring buffer in SRAM that the CPU copies over to the USB FIFO.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Expert 1630 points
    Okay, I get that USBRingBufAdvanceWrite write into the FIFO but when I look at the code of USBRingBufAdvanceWrite I don't see a function call to enable the transmission with the PC.
  • 0 in reply to Mathieu L.
    TI__Guru**** 244400 points
    Hello Mathieu

    Did you check how the pointers are allocated to the buffer?

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Expert 1630 points

    Hi,

    I don't get all the link that are in the USB API. If I call USBBufferDataWritten then it call USBRingBufAdvanceWrite. But what enable the USB transfer, it is a lower layer that manage the transfer? Also, when I declare the bulk device struct in the bulk device exemple, in the USBbuffer struct, it write that it is "USBDBulkPacketWrite" that is assign to transfer. How it is link to the 2 other functions, I mentionned earlier.

    Is there a mechanism that automatically send the data from the FIFO usb buffer to the host PC? Because FIFO buffer look like data queued to be send to the host PC?
    and if the MCU is put into device mode, therefore it is the host PC that request transfer from the MCU? So, on the MCU's side you just have to manage to write data in the proper location?

  • 0 in reply to Mathieu L.
    TI__Guru**** 244400 points
    Hello Mathieu

    The USB FIFO and the USB MAC handle the data transmission internally in HW. You do not need to worry about that. This is done when the user writes to the FIFO and sets the TXRDY bit in the USBCSRLx register. On the MCU side you just need to ensure that the data is writtent as per the max transfer size and the TXRDY and DATAEND bits are managed.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Expert 1630 points
    So to increase my current rate, I could use the DMA to write into the FIFO? Will it make any gain in transfer rate?
  • 0 in reply to Mathieu L.
    TI__Guru**** 244400 points
    Hello Mathieu,

    The data rate on the physical line is dependent on the how much data can be written to the FIFO. If you can ensure that the FIFO has always data ready to be transmitted the line data bandwidth shall remain high. On the other hand the data written to the FIFO is decided by the CPU and DMA arbitration. If the CPU hogs onto the SRAM the DMA will be starved of bandwidth.

    Regards
    Amit