• State
  • Locked Locked
  • Replies 7 replies
  • Subscribers 31 subscribers
  • Views 906 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TM4C1294 I2C bus recovery

Simon Gao
Prodigy 90 points


I am using TM4C1294 to control several I2C devices, such as DAC, EEPROM, ADC, etc. My question is if the I2C bus hangs (SDA=0), what is the best way to recover the bus without power cycle? Is there any example code available?

Thanks,

Simon

  • 0
    TI__Guru**** 244400 points
    Hello Simon,

    If the bus is being held low by external slave then unless there is mentioned a mechanism of IO toggle then power cycling the slave devices is the only option. If the bus is being held low by the master, then you can use the Clock Low Timeout to reset the bus. if that does not work then reset the I2C Master Module on the TM4C12x device.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Prodigy 90 points

    Hollo Amit,

    Thank you very much for your quick reply.

    The bus is being held by an external slave for sure. 

    I heard about the IO toggle a little bit . Would you please advise that how to implement it on TM4C129X device? 

    Best Regards,

    Simon

  • 0 in reply to Simon Gao
    TI__Guru**** 244400 points
    Hello Simon,

    Some slave devices may release the bus if they see the SCL clocking (found one device almost 2 years back). This may not be the case for every I2C Slave. If it is being held up by slave, I would suggest using a FET switch to power the slave with gate connected to a GPIO that is driven high to power the slave

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Prodigy 90 points
    Hi Amit,

    Thank you very much for your suggestion.

    I will add FET to control slave power, so I can power cycle it in case it hang the bus.

    Best Regards,

    Simon
  • 0 in reply to Simon Gao
    Guru 47900 points

    May I "second" Amit's identification of, "multiple/excess" SCL clocking to (usually) free a "hung" I2C slave.

    We've found this mechanism to most always work - unless the separation between master & slave is great - pull-ups are too weak - or power @ the slave is marginal.

    While adding a "GPIO driven FET" can reset the slave - loss of that GPIO may be avoided... (at the cost of small added circuitry @ the slave)

  • 0 in reply to cb1
    Prodigy 90 points

    HI cb1,

    Thank you very much for your reply.

    Would you please provide more information about the mechanism you mentioned? How to implement it on TM4C129x?

    Best Regards,

    Simon

     

  • 0 in reply to Simon Gao
    Guru 117855 points

    Our firm has developed a proprietary device which is able to recognize an input clock's narrow frequency band - which when maintained for a specified duration - will generate an adjustable "one-shot" power removal from a remote (connected) device.    This saves the cost & routing of a (usual) long, added GPIO signal run & powering FET & gate circuitry.    Our device is entirely MCU & IC agnostic - presently may source up to 5V @ 100mA.

    You may be able to implement such via an analog comparator configured to provide, "Frequency to Voltage" conversion - along with a proper, pulsed signal output...