ADC Offset

#include <stdint.h>
#include <stdbool.h>
#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/gpio.h"
#include "driverlib/interrupt.h"
#include "driverlib/pin_map.h"
#include "driverlib/sysctl.h"
#include "driverlib/adc.h"
#include "driverlib/timer.h"
#include "driverlib/rom.h"

uint32_t ADC0ValueS0[5];

// The interrupt handler for the ADC interrupt.
void ADC0IntHandlerS0(void)
{
	// Read ADC Values.
	ROM_ADCSequenceDataGet(ADC0_BASE, 0, ADC0ValueS0);
	
	// Clear the ADC interrupt flag.
	ROM_ADCIntClear(ADC0_BASE, 0);
}

void ConfigADC0S0(void)
{
    //
    // The ADC0 peripheral must be enabled for use.
    //
	ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
	ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 1);

    //
    // Enable the ports
    //
	ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
	ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
	ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);

	//
	// Set reference to the internal 3.3V reference
	//
	ROM_ADCReferenceSet(ADC0_BASE, ADC_REF_INT);

    //
    // Select the analog ADC function for these pins.
	// SIG1, SIG2, SIG3, SIG4, SIG5
	//
	ROM_GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0);
	ROM_GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_1);
	ROM_GPIOPinTypeADC(GPIO_PORTK_BASE, GPIO_PIN_2);

	//
	// Enable sample sequence 0 with a processor signal trigger
	//
	ROM_ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_PROCESSOR, 0);

	ROM_ADCSequenceStepConfigure(ADC0_BASE, 0, 0, ADC_CTL_CH1);
	ROM_ADCSequenceStepConfigure(ADC0_BASE, 0, 1, ADC_CTL_CH2);
	ROM_ADCSequenceStepConfigure(ADC0_BASE, 0, 2, ADC_CTL_CH3);
	ROM_ADCSequenceStepConfigure(ADC0_BASE, 0, 3, ADC_CTL_CH14);
	ROM_ADCSequenceStepConfigure(ADC0_BASE, 0, 4, ADC_CTL_CH18 | ADC_CTL_IE | ADC_CTL_END);

	//
	// Register the ADC interrupt for sequencer 0
	//
	ADCIntRegister(ADC0_BASE, 0, ADC0IntHandlerS0);

	//
	// Enable ADC Seq 0 interrupt
	//
	ROM_ADCIntEnable(ADC0_BASE, 0);

	//
	// Since sample sequence 0 is now configured, it must be enabled.
	//
	ROM_ADCSequenceEnable(ADC0_BASE, 0);

	//
	// Clear the interrupt status flag
	//
	ROM_ADCIntClear(ADC0_BASE, 0);
}

void TriggerADC(void)
{
	ROM_ADCProcessorTrigger(ADC0_BASE, 0);
}