RM48L952 RTI Timers (Restarting and Updating Period)

I found a work-around to update the timing.  I essentially invoke rtiInit(), but update the following to a specified value:

/** - Setup compare 0 value. This value is compared with selected free running counter. */
rtiREG1->CMP[0U].COMPx = newValue;

/** - Setup update compare 0 value. This value is added to the compare 0 value on each compare match. */
rtiREG1->CMP[0U].UDCPx = newValue;

I have the following Halcogen configuration, but the shortest period I can get is 16.4ms.  

The configuration mentions that the Actual Freq is 10Mhz.  Why is smalles resolution only 16.4ms for RTI and not less?

I need to get to 2ms period.

Thanks.

Ubaid

Hello,

Attaching more configuration snapshots for additional detail as well as source for rtiInit()

rtiInit() Source Code

void rtiInit(void)
{
/* USER CODE BEGIN (3) */
	if(g_printFunction && !rtiInitUsed)
	{
		rtiInitUsed = 1;
		strcat(g_RTI_buffer, __FUNCTION__);
		strcat(g_RTI_buffer, ",\r\n");
	}
/* USER CODE END */
    /** @b Initialize @b RTI1: */

    /** - Setup NTU source, debug options and disable both counter blocks */
    rtiREG1->GCTRL = (uint32)((uint32)0x0U << 16U) | 0x00000000U;

    /** - Setup timebase for free running counter 0 */
    rtiREG1->TBCTRL = 0x00000000U;

    /** - Enable/Disable capture event sources for both counter blocks */
    rtiREG1->CAPCTRL = 0U | 0U;

    /** - Setup input source compare 0-3 */
    rtiREG1->COMPCTRL = 0x00001000U | 0x00000100U | 0x00000000U | 0x00000000U;

    /** - Reset up counter 0 */
    rtiREG1->CNT[0U].UCx = 0x00000000U;

    /** - Reset free running counter 0 */
    rtiREG1->CNT[0U].FRCx = 0x00000000U;

    /** - Setup up counter 0 compare value 
    *     - 0x00000000: Divide by 2^32
    *     - 0x00000001-0xFFFFFFFF: Divide by (CPUC0 + 1)
    */
    rtiREG1->CNT[0U].CPUCx = 9U;

    /** - Reset up counter 1 */
    rtiREG1->CNT[1U].UCx = 0x00000000U;

    /** - Reset free running counter 1 */
    rtiREG1->CNT[1U].FRCx  = 0x00000000U;

    /** - Setup up counter 1 compare value 
    *     - 0x00000000: Divide by 2^32
    *     - 0x00000001-0xFFFFFFFF: Divide by (CPUC1 + 1)
    */
    rtiREG1->CNT[1U].CPUCx = 9U;

    /** - Setup compare 0 value. This value is compared with selected free running counter. */
    rtiREG1->CMP[0U].COMPx = 2000000U;

    /** - Setup update compare 0 value. This value is added to the compare 0 value on each compare match. */
    rtiREG1->CMP[0U].UDCPx = 2000000U;

    /** - Setup compare 1 value. This value is compared with selected free running counter. */
    rtiREG1->CMP[1U].COMPx = 100000U;

    /** - Setup update compare 1 value. This value is added to the compare 1 value on each compare match. */
    rtiREG1->CMP[1U].UDCPx = 100000U;

    /** - Setup compare 2 value. This value is compared with selected free running counter. */
    rtiREG1->CMP[2U].COMPx = 80000U;

    /** - Setup update compare 2 value. This value is added to the compare 2 value on each compare match. */
    rtiREG1->CMP[2U].UDCPx = 80000U;

    /** - Setup compare 3 value. This value is compared with selected free running counter. */
    rtiREG1->CMP[3U].COMPx = 100000U;

    /** - Setup update compare 3 value. This value is added to the compare 3 value on each compare match. */
    rtiREG1->CMP[3U].UDCPx = 100000U;

    /** - Clear all pending interrupts */
    rtiREG1->INTFLAG = 0x0007000FU;

    /** - Disable all interrupts */
    rtiREG1->CLEARINTENA = 0x00070F0FU;

    /**   @note This function has to be called before the driver can be used.\n
    *           This function has to be executed in privileged mode.\n
    *           This function does not start the counters.
    */

/* USER CODE BEGIN (4) */
/* USER CODE END */
}

Hello:

We have received your post and will direct it to one of our experts.

Regards.

Hi Ubaid Mahmood,

Sorry I did not get your question. 

Are you looking for a RTI interrupt every 2ms? 

Hello Prathap,

Yes. We need the RTI to interrupt down to 2ms. How must RTI be configured to acheive this? The current configuration seemingly would meet a timing response of 2ms, but it is not getting below 16.4ms.

Thanks.
Ubaid

Hi Ubaid,

Please find the attached project to get 2ms RTI interrupt, try opening the HALCoGen project and see the RTI settings. Hope it helps. 3122.rtiTest.zip

Thanks Prathap,

I noticd that PLL2 is changed from 48 Hz to 220Hz. What type of impact would it have on the USB Host Controller?
Currently VLCKA3 Divider is set to 4. VCLKA3_DIVR = 12.0. VLCKA3(_S) = 48.

We need to support USB Host as well as RTI functionality. Is this possible?

Thanks.
Ubaid

Hi Ubaid,

Sorry I am not a USB expert to comment.

But you could always have RTI source by VCLK ( which intern sourced from PLL1) and USB ( VCLKA3) can be sourced from PLL2, which can be configured for 48MHz or what ever frequency you want. These configurations can be done through HALCoGen GCM Tab.

So RTI runs at much higher clock which should meet your 2ms tick requirement. 

Hello Prathap,

I resolved my problem earlier. In our configuration USB and RTI have same source clocks. You are correct that the clock frequency is sufficient for my requirements. In my previous attempt I neglected to update RTIINTFLAG once the interrupt occurred:
rtiREG1->INTFLAG = 1U;

Can you please clarify for me this register? The spec mentions that "Interrupt flag 0. These bits determine if an interrupt due to a Compare 1 match is pending." I don't quite understand this statement.

Secondly, I need to dynamically adjust the period for a timer.

If I invoke:
rtiSetPeriod(rtiCOMPARE0, newPeriod);

The RTI doesn't use the new period until the 2nd cycle.

I realize I need to invoke the sequence below to get my expected behavior:
rtiSetPeriod(rtiCOMPARE0, newPeriod);
rtiResetCounter(rtiCOUNTER_BLOCK0);
rtiREG1->CMP[rtiCOMPARE0].COMPx = newPeriod;

Is this how should be adjusting the clock period so that it takes affect on the very next interrupt?

Thanks.
Ubaid