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Maximum wait times while checking PLL slip and clock monitor

Other Parts Discussed in Thread: HALCOGEN

Hello,

I am using functions checkClockMonitor(), checkPLL1Slip() and checkPLL2Slip() generated by halcogen. For safety reasons we can not have while() loops which are just waiting for a bit to change (in case of a hardware error, if the bit never changes it would be an infinite loop). For that reason I need to know the maximum wait time for all while() loops in the previous mentioned functions.

checkPLL1Slip()

1) Maximum time needed for the PLL slip flag to be set. /* Wait till PLL slip flag is set */  while((systemREG1->GBLSTAT & 0x300U) == 0U)

2) Maximum time needed until PLL1 is disabled  /* Wait till PLL1 is disabled */ while((systemREG1->CSDIS & 0x2U) == 0U)

3) Maximum time needed until PLL1 is enable again while((systemREG1->CSDIS & 0x2U) != 0U)

checkPLL2Slip()

1) Maximum time until ESM error is signaled after a PLL2 slip while((esmREG->SR4[0U] & 0x400U) != 0x400U)

I have removed this loop and function is working properly. Is it correct to assume that this time is 0 or at least below 1 cycle?

2) Maximum time needed until PLL2 is disabled  while((systemREG1->CSDIS & 0x40U) == 0U)

3) Maximum time needed until PLL2 is enabled again.  while((systemREG1->CSDIS & 0x40U) != 0U)

checkClockMonitor()

1) Maximum time needed until oscillator flag is set  while((systemREG1->GBLSTAT & 0x1U) == 0U)

2) Maximum time needed until oscillator is enabled again while((systemREG1->CSVSTAT & 0x3U) == 0U)

Thanks for you help,

Francis.

  • Francis,

    I understand your constraint. I'll answer the easy questions first. The TRM shows PLL lock times.

    PLL enable: (512 + NR*1024 + 6) OSCIN cycles (NR is the divider you apply to the OSC input before you give this clock to the PLL; the value is contained in PLLCTRL1)

    PLL disable: 150 OSCIN cycles

    The slip should be set within a couple of reference periods (OSCIN/NR). This value is not a digitally controlled value but instead relies upon the response of the PLL.  If you are looking for a safe value, the slip bit should never fall outside of the limit defined by1024*NR OSCIN cycles.

    The oscillator is also hard to define since the mechanical system has inertia. The oscillator can take milliseconds to start but this is heavily dependent upon your system. I don't think I can generically answer the time it takes for the oscillator to die out or start-up.

    Best regards,

    Kevin Lavery