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TMS570LS Technical Reference - NHET - ECMP Instruction Description

Jeff Stafford
Expert 4595 points

Reading the NHET chapter of the TMS570LS Technical Reference, the ECMP instruction has the following description:

 

If the hr_lr bit is cleared, the pin action will occur after a high resolution delay from the next

resolution clock.

 

What is meant by the phrase "next resolution clock"?  Is this the next "high resolution clock" or some other clock?  I expect the delay to start on the next high resolution clock. 

Please confirm.

  • 0
    TI__Mastermind 49120 points

    Jeff,

    The TMS570LS technical reference manual has a very apt example on page 1237 (page number 1229 if you have printed the TRM). This explains the use of the hr_data field when using the ECMP instruction to generate a PWM signal.

    The "next resolution clock" refers to the next loop resolution clock once a compare match occurs. If the HR mode is used, then the number of HR cycles are counted from this next loop resolution clock edge.

    Regards,

    Sunil