Hi all,
I am trying to configure my board (tm4c123gh6pm) as a usb host in order to communicate with another device. I use the board library and tried to follow datasheet's instructions. The thing is, when USB0_EPC_R&=~0x001;//USB_EPC_EPEN_LOW is reached, a FaultISR occurs, so there is an error when configuring that I am not able to solve. When following the instructions from the datasheet, I see that the following is required:
-Ports B and D initialization (some pins can be used for the same purpose) and configured for USB
-It is required that the processor enables USB controller and USB controller's physical interface (PHY) before setting any register. I am not totally sure but I would say that the problem or main problem is here.
-USB0EPEN and USB0PFTL should be configured to be controlled by USB controller.
The method to initialize USB is the following:
void USB_init()
{
volatile unsigned long delay;
SYSCTL_RCGC2_R |= SYSCTL_RCGC2_USB0; // activate clock for USB0
SYSCTL_RCGC2_R |=SYSCTL_RCGC2_GPIOB+SYSCTL_RCGC2_GPIOD; //activate clock for ports B and D
delay = SYSCTL_RCGC2_R; // allow time for clock to stabilize
GPIO_PORTB_DIR_R &= ~0x01; // make PB0 input (PB1 could be input or output)
GPIO_PORTB_AFSEL_R |= 0x03; // enable alternate function on PB0 and PB1
GPIO_PORTB_DEN_R &= ~0x03; // disable digital I/O on PB0 and PB1
GPIO_PORTB_AMSEL_R |= 0x03; // enable analog function on PB0 and PB1
GPIO_PORTD_DIR_R |= 0x04; // make PD2 output
GPIO_PORTD_DIR_R &= ~0x08; // make PD3 input
GPIO_PORTD_AFSEL_R |= 0x3C; // enable alternate function on PD2, PD3, PD4 and PD5
GPIO_PORTD_DEN_R &= ~0x30; // disable digital I/O on PD4 and PD5
GPIO_PORTD_DEN_R |= 0x0C; // disable digital I/O on PD2 and PD3
GPIO_PORTD_AMSEL_R |= 0x30; // enable analog function on PD4 and PD5
// configure Port B for USB
GPIO_PORTB_PCTL_R = (GPIO_PORTB_PCTL_R&0xFFFFFF00)+GPIO_PCTL_PB0_USB0ID+GPIO_PCTL_PB1_USB0VBUS;
// configure Port D for USB
GPIO_PORTD_PCTL_R = (GPIO_PORTD_PCTL_R&0xFFF000FF)+GPIO_PCTL_PD2_USB0EPEN|GPIO_PCTL_PD4_USB0DM|GPIO_PCTL_PD3_USB0PFLT;
//It is required that the processor enables USB controller and USB controller's physical interface (PHY) before setting any register
USB0_PP_R|=USB_PP_USB_M|USB_PP_PHY|USB_PP_USB_HOSTDEVICE;
//Enable USB PLL
SYSCTL_RCC2_R&=~SYSCTL_RCC2_USBPWRDN;
//Software reset control
SYSCTL_SRCR2_R|=SYSCTL_SRCR2_USB0;
//To avoid voltage supplied to the VBUS incorrectly, USB0EPEN and USB0PFLT should be negated to be controlled by the USB controller
USB0_EPC_R&=~0x001;//USB_EPC_EPEN_LOW
USB0_EPC_R&=~USB_EPC_PFLTAEN;
}
Thans for your help,
Javier
